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[2620:137:e000::1:20]) by mx.google.com with ESMTP id n2-20020a170902d2c200b0017555e9de54si905491plc.427.2022.09.20.00.03.20; Tue, 20 Sep 2022 00:03:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=YbI2CTg3; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230030AbiITGJO (ORCPT + 99 others); Tue, 20 Sep 2022 02:09:14 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229814AbiITGJM (ORCPT ); Tue, 20 Sep 2022 02:09:12 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A65E5FEE; Mon, 19 Sep 2022 23:09:11 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 2B252B824A7; Tue, 20 Sep 2022 06:09:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CD1E8C43146; Tue, 20 Sep 2022 06:09:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1663654148; bh=zfzusDb14FFN7gQb0UhtuJazqWZoNGqu03mLfuxOeXs=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=YbI2CTg3AVEHucpqvxxaOBdV2hkT2IvObY2/2uiRAZl4LPc9txSPdOupykJxFAVMc //M1Mzrw51exNgGidLKPFzwB2m4s2KkxAWKM+gxkfmmzAs92T6BvEnuxAhOnjET2Uy guixZF8zkN6jDCP9wBE0CW4uzx10LCsB/Zw0QyfLPL3S5HHfhxe4N3QfiwWQxLXUlv VS93azSDm5Zu3A5wdiUUcSxH0RC8wBu68DtFdUPG12joDbj1/sfdHWx7rHO3ntTRUI 3Nqsk16We6SY3LXy2sKztSn5Aif3XmkpHd4e7siFVjY6My6yOF56ojfwtJ69uSEZQ2 xVkCfLpwCUSlw== Received: by mail-oa1-f41.google.com with SMTP id 586e51a60fabf-127ba06d03fso2795999fac.3; Mon, 19 Sep 2022 23:09:08 -0700 (PDT) X-Gm-Message-State: ACrzQf15jnapojjA9H2dUaLEtHyEEjmUPGhmNhR61zssylhfaEziAXiA g+uK6H7PPILI84Cv9pP/b3bQ2bmZFMnLlhsYPiI= X-Received: by 2002:a05:6870:5803:b0:12c:c3e0:99dc with SMTP id r3-20020a056870580300b0012cc3e099dcmr1079696oap.19.1663654147825; Mon, 19 Sep 2022 23:09:07 -0700 (PDT) MIME-Version: 1.0 References: <20220918155246.1203293-1-guoren@kernel.org> <20220918155246.1203293-9-guoren@kernel.org> In-Reply-To: From: Guo Ren Date: Tue, 20 Sep 2022 14:08:55 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V5 08/11] riscv: Support HAVE_IRQ_EXIT_ON_IRQ_STACK To: Peter Zijlstra Cc: arnd@arndb.de, palmer@rivosinc.com, tglx@linutronix.de, luto@kernel.org, conor.dooley@microchip.com, heiko@sntech.de, jszhang@kernel.org, lazyparser@gmail.com, falcon@tinylab.org, chenhuacai@kernel.org, apatel@ventanamicro.com, atishp@atishpatra.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mark.rutland@arm.com, zouyipeng@huawei.com, bigeasy@linutronix.de, David.Laight@aculab.com, linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Guo Ren , keescook@chromium.org Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 19, 2022 at 9:45 PM Peter Zijlstra wrote: > > On Sun, Sep 18, 2022 at 11:52:43AM -0400, guoren@kernel.org wrote: > > > +ENTRY(call_on_stack) > > + /* Create a frame record to save our ra and fp */ > > + addi sp, sp, -RISCV_SZPTR > > + REG_S ra, (sp) > > + addi sp, sp, -RISCV_SZPTR > > + REG_S fp, (sp) > > + > > + /* Save sp in fp */ > > + move fp, sp > > + > > + /* Move to the new stack and call the function there */ > > + li a3, IRQ_STACK_SIZE > > + add sp, a1, a3 > > + jalr a2 > > + > > + /* > > + * Restore sp from prev fp, and fp, ra from the frame > > + */ > > + move sp, fp > > + REG_L fp, (sp) > > + addi sp, sp, RISCV_SZPTR > > + REG_L ra, (sp) > > + addi sp, sp, RISCV_SZPTR > > + ret > > +ENDPROC(call_on_stack) > > IIRC x86_64 moved away from a stack-switch function like this because it > presents a convenient exploit gadget. I found: https://lore.kernel.org/all/20210204204903.350275743@linutronix.de/ - The fact that the stack switching code ended up being an easy to find exploit gadget. What's the exploit gadget? Do you have a ref link? Thx. > > I'm not much of an exploit writer and I've no idea how effective our > inline stategy is, perhaps other can comment. It seems that I should move to an inline flavor. a0cfc74d0b00 ("x86/irq: Provide macro for inlining irq stack switching") -- Best Regards Guo Ren