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[209.85.219.173]) by smtp.gmail.com with ESMTPSA id z22-20020ae9c116000000b006b60d5a7205sm21474qki.51.2022.09.20.05.18.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 Sep 2022 05:18:02 -0700 (PDT) Received: by mail-yb1-f173.google.com with SMTP id a67so3104787ybb.3; Tue, 20 Sep 2022 05:18:01 -0700 (PDT) X-Received: by 2002:a05:6902:45:b0:6ae:ce15:a08d with SMTP id m5-20020a056902004500b006aece15a08dmr18526994ybh.380.1663676281670; Tue, 20 Sep 2022 05:18:01 -0700 (PDT) MIME-Version: 1.0 References: <20220915181558.354737-1-prabhakar.mahadev-lad.rj@bp.renesas.com> <20220915181558.354737-8-prabhakar.mahadev-lad.rj@bp.renesas.com> <3693a3a1-5a2a-4cc5-fb55-f6ad9a4b3f72@microchip.com> In-Reply-To: From: Geert Uytterhoeven Date: Tue, 20 Sep 2022 14:17:50 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 07/10] riscv: boot: dts: r9a07g043: Add placeholder nodes To: Conor Dooley Cc: "Lad, Prabhakar" , Conor.Dooley@microchip.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, heiko@sntech.de, atishp@rivosinc.com, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, biju.das.jz@bp.renesas.com, prabhakar.mahadev-lad.rj@bp.renesas.com Content-Type: text/plain; charset="UTF-8" X-Spam-Status: No, score=-1.4 required=5.0 tests=BAYES_00, FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS, RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Conor, On Fri, Sep 16, 2022 at 12:40 AM Conor Dooley wrote: > On 15/09/2022 23:26, Lad, Prabhakar wrote: > > On Thu, Sep 15, 2022 at 10:36 PM wrote: > >> On 15/09/2022 19:15, Prabhakar wrote: > >>> riscv: boot: dts: r9a07g043: Add placeholder nodes > >>> From: Lad Prabhakar > >>> Add empty placeholder nodes to RZ/Five (R9A07G043) SoC DTSI. > >> Can you explain why do you need placeholder nodes for this and > >> cannot just directly include the other dtsis? > >> > > Since the RZ/G2UL SoC is ARM64 where it has a GIC and on RZ/Five SoC > > we have PLIC for interrupts. Also the interrupt numbering for RZ/Five > > SoC differs from RZ/G2UL SoC hence we are not directly using the > > RZ/G2UL SoC DTSI [0]. > > > > [0] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/r9a07g043.dtsi?h=v6.0-rc5 > > > > For the RZ/Five SMARC EVK I am re-using the below files [1] (SoM) and > > [2] (Carrier board) as the RZ/Five SMARC EVK is pin compatible. Since > > I am re-using these when trying to compile the RZ/Five DTB I get > > compilation errors since the nodes dont exist (and there is no way > > currently we can delete the node reference when the actual node itself > > isn't present) hence these place holders. > > > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?h=v6.0-rc5 > > [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi?h=v6.0-rc5 > > If this method is acceptable to Geert, this explanation 100% needs to > go into the commit message. We've been using these placeholders a lot in Renesas SoC-specific .dtsi files, as they allow us to introduce gradually support for a new SoC that is mounted on an existing PCB, and thus shares a board-specific .dtsi file. Hence I'm fine with this. However, I think more properties can be dropped from the placeholders. There is no need to have e.g. 'reg-names' and 'status = "disabled"' (there is no compatible value, so no matching is done). Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds