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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: MN0PR12MB5953.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d9031210-8a81-489f-8ca9-08da9affa6af X-MS-Exchange-CrossTenant-originalarrivaltime: 20 Sep 2022 12:00:03.0050 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: AGMpkiVTmIgPxx7vzlKl++YUub2Nz35xZX+XVsG8JiRUasveHh/w7nAAhwUgEPF1 X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7294 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Vinod Koul > Sent: Tuesday, September 20, 2022 4:57 PM > To: Gaddam, Sarath Babu Naidu > Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org; > lars@metafoo.de; adrianml@alumnos.upm.es; dmaengine@vger.kernel.org; > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; Simek, Michal ; Pandey, > Radhey Shyam ; Sarangi, Anirudha > ; Katakam, Harini > ; git@xilinx.com; git (AMD-Xilinx) > > Subject: Re: [RFC V3 PATCH 0/8] Xilinx DMA enhancements and optimization >=20 > On 20-09-22, 11:21, Sarath Babu Naidu Gaddam wrote: > > Some background about the patch series: Xilinx Axi Ethernet device > > driver > > (xilinx_axienet_main.c) currently has axi-dma code inside it. The goal > > is to refactor axiethernet driver and use existing AXI DMA driver > > using DMAEngine API. > > > > This patchset does feature addition and optimization to support axidma > > integration with axiethernet network driver. Once axidma version is > > accepted mcdma specific changes will be added in followup version. >=20 > why is this tagged RFC? Is it not ready for merge? To recap - In v3, the new addition is "[PATCH 8/8] dmaengine:=20 xilinx_dma: Add device_config support" along with addressing=20 RFC v2 comment.=20 8/8 is initial proposal on how to implement coalesce feature in dmaengine driver to support ethernet usecases. Thought was that it's better to have this idea reviewed as RFC before=20 extending the logic for other IP variants and spin sanity test all usecases.=20 Fallback option is to split this series and send patches which are already reviewed in RFC v2 as PATCH and only 8/8 (which need=20 more discussion/framework extension) as RFC? Let me know your thoughts.=20 Thanks, Radhey >=20 > > > > Changes for V2: > > - Use metadata API[1] for passing metadata from dma to netdev client. > > - Read irq-delay from DT. > > - Remove desc_callback_valid check. > > - Addressed RFC v1 comments[2]. > > - Minor code refactoring. > > > > Changes for V3: > > - Add device_config support for passing any dma client data. > > - Address RFC v2 comments. > > - remove hardcoding for axidma_tx_segment. > > - Below review comment is in pipeline. We are facing a race issue w= hen > > addressing it. we will fix it in the next version. > > "chan->idle =3D true; in xilinx_dma_irq_handler() needs to be gat= ed on > > the active_list being empty". > > > > Comments, suggestions are very welcome > > > > Radhey Shyam Pandey (7): > > dt-bindings: dmaengine: xilinx_dma: Add xlnx,axistream-connected > > property > > dt-bindings: dmaengine: xilinx_dma: Add xlnx,irq-delay property > > dmaengine: xilinx_dma: Pass AXI4-Stream control words to dma client > > dmaengine: xilinx_dma: Increase AXI DMA transaction segment count > > dmaengine: xilinx_dma: Freeup active list based on descriptor > > completion bit > > dmaengine: xilinx_dma: Use tasklet_hi_schedule for timing critical > > usecase > > dmaengine: xilinx_dma: Program interrupt delay timeout > > > > Sarath Babu Naidu Gaddam (1): > > dmaengine: xilinx_dma: Add device_config support > > > > .../bindings/dma/xilinx/xilinx_dma.txt | 4 + > > drivers/dma/xilinx/xilinx_dma.c | 107 ++++++++++++++++-- > > include/linux/dma/xilinx_dma.h | 16 +++ > > 3 files changed, 115 insertions(+), 12 deletions(-) > > > > -- > > 2.25.1 >=20 > -- > ~Vinod