Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp4051638rwb; Tue, 20 Sep 2022 08:11:02 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7W1f5/xdRBmfInO7dWklgt1xMre1qjEjrUSLP2lcqf0niJJvbvhNMkseifgWE1jg8uA4BK X-Received: by 2002:a17:907:971e:b0:77b:b0f3:6473 with SMTP id jg30-20020a170907971e00b0077bb0f36473mr16976841ejc.754.1663686662051; Tue, 20 Sep 2022 08:11:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663686662; cv=none; d=google.com; s=arc-20160816; b=hXkiZ04rd8cLqVvrWOAraQXT+4jLqs13ucyX+IfL7UkCgRvZOlRLmFDVVfvw+4fGgG O9t0risiPJ2FlFzGeW4iUSrMWVLZd0wue7HmaU8I7U8rzbayhB9L7RJPJCDF94j4wNLm fIOuGp2qyDXnskUJuezqaopa0zQb/TwsmUOv+c4hGDR+hW8IARckU4Qfg+Yb8nqJuKjF NGG2AAmYVgSVv4/2Iwt3bUCf2iKWYIZRs5JYe2CIhJebK8N3D53au5uQlN1f2WyAmuBf 0mx5rwDDJvULfyu98GnkcyZVlla022oQHEs0Gnc5+cvgw4lrDz1Tfi2j2smwj16gEBl0 E2JA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=DSNp/uharmpReYy+YC5O0owair4IDAzJu/dQoMj9EuE=; b=YYmSvFktr/CbW2KcrCvoJGZeUYK8VPgOcnHUPNAwwezaQYfZ2HToV4JbLoZ3imvk2F Vnhmh02xEXOO9bgurWEybZzrv5eWPJiaU96DJ/oBnW4vdCuij4ul5IMDVcVqn92jXvKQ 9PXOslFBhU1TdolvfP+kamhHpAIVnFiL+VbjTbyIAhlMjo/Xb07H+NGocQ9/bvxrqf8p aovfQgQi4lpDKiRJmWuBVtaOrQx5c9JvBf8KmSpVa8FbTpH/T3vg17yW8yWv6umYEHUw igNQd7svAZGsixtXLa+s1ZWLwI+Yf1oDffjAQUo1T9UZyI5plUpNPcLJt9PnHcefMOKm 4TwQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@edgeble-ai.20210112.gappssmtp.com header.s=20210112 header.b=JGndOtli; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id gv2-20020a170906f10200b00779a69067afsi1309713ejb.830.2022.09.20.08.10.35; Tue, 20 Sep 2022 08:11:02 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@edgeble-ai.20210112.gappssmtp.com header.s=20210112 header.b=JGndOtli; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231164AbiITOMg (ORCPT + 99 others); Tue, 20 Sep 2022 10:12:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44422 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231670AbiITOL5 (ORCPT ); Tue, 20 Sep 2022 10:11:57 -0400 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7AE915FF76 for ; Tue, 20 Sep 2022 07:10:28 -0700 (PDT) Received: by mail-pj1-x102d.google.com with SMTP id fs14so3172308pjb.5 for ; Tue, 20 Sep 2022 07:10:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=edgeble-ai.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=DSNp/uharmpReYy+YC5O0owair4IDAzJu/dQoMj9EuE=; b=JGndOtlikbTpSUbPqg2ojZV/PXcChJ3VizuBebT9Sawr5R1L0a/3IKUD+C46gPVshH /wQ1wlvkXfiT5X2OdpVJMDYv9ZealAuYXOQXYt9B18G/vmiE+aTapx769Uuj8yEV7TAO XasE/nQj5UZaPTG40sHhoZo3tA2mTvzMWuXVnZ3JfKfxZv03I8yIurRHtFuXVep0J9QS OVmj9HHW3QQcXqDmfW8cgGyFFtOosKlnaJCDXFE/eX04ih7Ob/DY58jASG4w15FEjukz C/XkGWhfQ1RgwyLRpk46pcOtLGZVA8bY4Z1IFmLSLs+KxPCieueXyhi+XQbrWXvA1U/M TXVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=DSNp/uharmpReYy+YC5O0owair4IDAzJu/dQoMj9EuE=; b=SmB8chSv3tRy64LMsn3Wx9LnYXVNoc//cAIG3v8qbdKBMjvL4rgV4wiu7dJzN82Aq+ yoQknF7B5o/85+FnGDbH5vswM5ISnxykvIA6WyGk5jvJJrbmvJhPgZ1Gg28JSgKfLFAK NV2ybuo3x02x8jK1XDEp9yt3ovHahJLOAx9wd4NCftW/bkBGStZZkb/P40aGKr2N3xFy n8z/EHh8NXXqDXrPlofykJWYH4mBg2y2+Pxamb4FbwD4WQzdQh2wPK4t852MTUlq8ag9 ChyAX30jzRJ0bW6tPb4Wr/VD5BVb+RhdFIs3nU+1Ttn40CfEXkh01qPO2C4j+1zc+Bb/ DVEQ== X-Gm-Message-State: ACrzQf2wfnO4IRQaLamH+XEqvne4n8q1J7sqswzfq4dEs+yCA4ixXMBI q0Hw3AfIbpuq/Jh7qoVCZeDrJw== X-Received: by 2002:a17:902:6542:b0:172:95d8:a777 with SMTP id d2-20020a170902654200b0017295d8a777mr4917335pln.61.1663683012286; Tue, 20 Sep 2022 07:10:12 -0700 (PDT) Received: from archl-hc1b.. ([103.51.75.120]) by smtp.gmail.com with ESMTPSA id t9-20020a170902e84900b001782a0d3eeasm1499858plg.115.2022.09.20.07.10.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Sep 2022 07:10:11 -0700 (PDT) From: Anand Moon To: Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin Cc: Anand Moon , linux-rockchip@lists.infradead.org, Sugar Zhang , David Wu , Jagan Teki , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v3 2/2] net: ethernet: stmicro: stmmac: dwmac-rk: Add rv1126 support Date: Tue, 20 Sep 2022 14:09:41 +0000 Message-Id: <20220920140944.2535-2-anand@edgeble.ai> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220920140944.2535-1-anand@edgeble.ai> References: <20220920140944.2535-1-anand@edgeble.ai> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_NONE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Rockchip RV1126 has GMAC 10/100/1000M ethernet controller via RGMII and RMII interfaces are configured via M0 and M1 pinmux. This patch adds rv1126 support by adding delay lines of M0 and M1 simultaneously. Signed-off-by: Sugar Zhang Signed-off-by: David Wu Signed-off-by: Anand Moon Signed-off-by: Jagan Teki --- v3: changes none rebased on linux-net-next v2: changes none --- --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 125 ++++++++++++++++++ 1 file changed, 125 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 15dea1f2a90a..f7269d79a385 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -1297,6 +1297,130 @@ static const struct rk_gmac_ops rv1108_ops = { .set_rmii_speed = rv1108_set_rmii_speed, }; +#define RV1126_GRF_GMAC_CON0 0X0070 +#define RV1126_GRF_GMAC_CON1 0X0074 +#define RV1126_GRF_GMAC_CON2 0X0078 + +/* RV1126_GRF_GMAC_CON0 */ +#define RV1126_GMAC_PHY_INTF_SEL_RGMII \ + (GRF_BIT(4) | GRF_CLR_BIT(5) | GRF_CLR_BIT(6)) +#define RV1126_GMAC_PHY_INTF_SEL_RMII \ + (GRF_CLR_BIT(4) | GRF_CLR_BIT(5) | GRF_BIT(6)) +#define RV1126_GMAC_FLOW_CTRL GRF_BIT(7) +#define RV1126_GMAC_FLOW_CTRL_CLR GRF_CLR_BIT(7) +#define RV1126_GMAC_M0_RXCLK_DLY_ENABLE GRF_BIT(1) +#define RV1126_GMAC_M0_RXCLK_DLY_DISABLE GRF_CLR_BIT(1) +#define RV1126_GMAC_M0_TXCLK_DLY_ENABLE GRF_BIT(0) +#define RV1126_GMAC_M0_TXCLK_DLY_DISABLE GRF_CLR_BIT(0) +#define RV1126_GMAC_M1_RXCLK_DLY_ENABLE GRF_BIT(3) +#define RV1126_GMAC_M1_RXCLK_DLY_DISABLE GRF_CLR_BIT(3) +#define RV1126_GMAC_M1_TXCLK_DLY_ENABLE GRF_BIT(2) +#define RV1126_GMAC_M1_TXCLK_DLY_DISABLE GRF_CLR_BIT(2) + +/* RV1126_GRF_GMAC_CON1 */ +#define RV1126_GMAC_M0_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 8) +#define RV1126_GMAC_M0_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0) +/* RV1126_GRF_GMAC_CON2 */ +#define RV1126_GMAC_M1_CLK_RX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 8) +#define RV1126_GMAC_M1_CLK_TX_DL_CFG(val) HIWORD_UPDATE(val, 0x7F, 0) + +static void rv1126_set_to_rgmii(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay) +{ + struct device *dev = &bsp_priv->pdev->dev; + + if (IS_ERR(bsp_priv->grf)) { + dev_err(dev, "Missing rockchip,grf property\n"); + return; + } + + regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON0, + RV1126_GMAC_PHY_INTF_SEL_RGMII | + RV1126_GMAC_M0_RXCLK_DLY_ENABLE | + RV1126_GMAC_M0_TXCLK_DLY_ENABLE | + RV1126_GMAC_M1_RXCLK_DLY_ENABLE | + RV1126_GMAC_M1_TXCLK_DLY_ENABLE); + + regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON1, + RV1126_GMAC_M0_CLK_RX_DL_CFG(rx_delay) | + RV1126_GMAC_M0_CLK_TX_DL_CFG(tx_delay)); + + regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON2, + RV1126_GMAC_M1_CLK_RX_DL_CFG(rx_delay) | + RV1126_GMAC_M1_CLK_TX_DL_CFG(tx_delay)); +} + +static void rv1126_set_to_rmii(struct rk_priv_data *bsp_priv) +{ + struct device *dev = &bsp_priv->pdev->dev; + + if (IS_ERR(bsp_priv->grf)) { + dev_err(dev, "%s: Missing rockchip,grf property\n", __func__); + return; + } + + regmap_write(bsp_priv->grf, RV1126_GRF_GMAC_CON0, + RV1126_GMAC_PHY_INTF_SEL_RMII); +} + +static void rv1126_set_rgmii_speed(struct rk_priv_data *bsp_priv, int speed) +{ + struct device *dev = &bsp_priv->pdev->dev; + unsigned long rate; + int ret; + + switch (speed) { + case 10: + rate = 2500000; + break; + case 100: + rate = 25000000; + break; + case 1000: + rate = 125000000; + break; + default: + dev_err(dev, "unknown speed value for RGMII speed=%d", speed); + return; + } + + ret = clk_set_rate(bsp_priv->clk_mac_speed, rate); + if (ret) + dev_err(dev, "%s: set clk_mac_speed rate %ld failed %d\n", + __func__, rate, ret); +} + +static void rv1126_set_rmii_speed(struct rk_priv_data *bsp_priv, int speed) +{ + struct device *dev = &bsp_priv->pdev->dev; + unsigned long rate; + int ret; + + switch (speed) { + case 10: + rate = 2500000; + break; + case 100: + rate = 25000000; + break; + default: + dev_err(dev, "unknown speed value for RGMII speed=%d", speed); + return; + } + + ret = clk_set_rate(bsp_priv->clk_mac_speed, rate); + if (ret) + dev_err(dev, "%s: set clk_mac_speed rate %ld failed %d\n", + __func__, rate, ret); +} + +static const struct rk_gmac_ops rv1126_ops = { + .set_to_rgmii = rv1126_set_to_rgmii, + .set_to_rmii = rv1126_set_to_rmii, + .set_rgmii_speed = rv1126_set_rgmii_speed, + .set_rmii_speed = rv1126_set_rmii_speed, +}; + #define RK_GRF_MACPHY_CON0 0xb00 #define RK_GRF_MACPHY_CON1 0xb04 #define RK_GRF_MACPHY_CON2 0xb08 @@ -1836,6 +1960,7 @@ static const struct of_device_id rk_gmac_dwmac_match[] = { { .compatible = "rockchip,rk3568-gmac", .data = &rk3568_ops }, { .compatible = "rockchip,rk3588-gmac", .data = &rk3588_ops }, { .compatible = "rockchip,rv1108-gmac", .data = &rv1108_ops }, + { .compatible = "rockchip,rv1126-gmac", .data = &rv1126_ops }, { } }; MODULE_DEVICE_TABLE(of, rk_gmac_dwmac_match); -- 2.37.3