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[2620:137:e000::1:20]) by mx.google.com with ESMTP id g15-20020a65594f000000b0043bd644dd8bsi1616673pgu.143.2022.09.20.20.24.30; Tue, 20 Sep 2022 20:24:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=O9BR7MjU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230357AbiIUDOG (ORCPT + 99 others); Tue, 20 Sep 2022 23:14:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42336 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230447AbiIUDNt (ORCPT ); Tue, 20 Sep 2022 23:13:49 -0400 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C69F57E31B; Tue, 20 Sep 2022 20:13:42 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 28L3DUbG040797; Tue, 20 Sep 2022 22:13:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1663730010; bh=A32xkVisoVf18XigM6AiIasXIwgAdFCI2xBmBDjc8Yg=; h=From:To:CC:Subject:Date; b=O9BR7MjUO+Gwob/5a0LhTP4ZbrGHyAsg4qGAPbE96p9aWsFmuAX9Htv3OGDqg4n+W kUKeONwaYrvpJf3LmlAcbstpShkfU/TYJ8wKS2+3/hmSdfIX85ZUINS02DUN7xnnP8 wbxJgGhgOpMrEFaqKt0jYjIWNRbRg98I8nTFRMyg= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 28L3DU6c117897 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 20 Sep 2022 22:13:30 -0500 Received: from DLEE105.ent.ti.com (157.170.170.35) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 20 Sep 2022 22:13:30 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 20 Sep 2022 22:13:30 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 28L3DS7v062677; Tue, 20 Sep 2022 22:13:29 -0500 From: Matt Ranostay To: , , CC: , , Subject: [PATCH v3 0/9] J721S2: Add support for additional IPs Date: Tue, 20 Sep 2022 20:13:18 -0700 Message-ID: <20220921031327.4135-1-mranostay@ti.com> X-Mailer: git-send-email 2.38.0.rc0.52.gdda7228a83 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The following series of patches add support for the following on J721S2 common processor board, - USB - SerDes - OSPI - PCIe Changes from v1: * Resolve issues with dt schema reporting * Minor changes related to consistency on node naming and value Changes from v2: * Added PCIe RC + EP enablement patchsets * Added device-id for j722s2 PCIe host in dt documentation * Reworked SERDES + WIZ enablement patchset to use properies for clocks defines versus entire devicetree nodes. Results in cleaner code that doesn't break dt-schema or the driver functionality. Aswath Govindraju (7): arm64: dts: ti: k3-j721s2-main: Add support for USB arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI arm64: dts: ti: k3-j721s2-common-proc-board: Enable SERDES0 arm64: dts: ti: k3-j721s2-common-proc-board: Add USB support arm64: dts: ti: k3-j721s2: Add support for OSPI Flashes arm64: dts: ti: k3-j721s2-main: Add PCIe device tree node arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe Matt Ranostay (2): arm64: dts: ti: k3-j721s2-main: Add SERDES and WIZ device tree node dt-bindings: PCI: Add host mode device-id for j721s2 platform .../bindings/pci/ti,j721e-pci-host.yaml | 2 + .../dts/ti/k3-j721s2-common-proc-board.dts | 92 +++++++++++ arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 156 ++++++++++++++++++ .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 40 +++++ arch/arm64/boot/dts/ti/k3-j721s2-som-p0.dtsi | 42 +++++ 5 files changed, 332 insertions(+) -- 2.37.2