Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp5111194rwb; Wed, 21 Sep 2022 03:23:28 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5XJpjlNwvYGESOkEtGKHnYf8wsO7L0VcgP32CfmO0Cl18l6MkIHnh4P7xVlZeZj1Dwkpf1 X-Received: by 2002:a17:906:fc6:b0:72f:d080:416 with SMTP id c6-20020a1709060fc600b0072fd0800416mr20609537ejk.1.1663755808539; Wed, 21 Sep 2022 03:23:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663755808; cv=none; d=google.com; s=arc-20160816; b=lJHSSmLr2J5O4mlINaeKgGmLJKjkw7oVcVHQG6aYuFeSHOdzSip27+juIgA1oGuHQS gG1ax00TmAoI+DQ0PWWOHyEW/Hbt+dmQ3d0uFaB90c90DCPz9NFLNd90e/r/biSXy7kj xrHpgodgUyowhUXQRj/P0CDUPq12K1nVbfPN2PeIhSsKgGwDMPacvo6OODxurAvh3LKQ PWQaha4tVTgZaw2YCLpRd7gMMlipO8NnXbMB/rpFdDv+KYYVsXbiZa4jy28aTyX7Gryx SeO4uQdXMPiY863WlD9+Zbzto3cLHihmeafCTiA6IopW5NHKul/WtxQfXP/EQUKqMSY5 whiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :content-language:subject:references:cc:to:user-agent:mime-version :date:message-id; bh=/HEnCvjIKUR3Dhp7rmWuu4/VJ0ZqSturCc0z3xbCkTY=; b=bak50q7OLYoIBSD0vB+o6oX4uJDAADv2zUngGib+Hyb9AmedDYdY9RbmUNg2kaMX// aK2EOldF6Kinqh0VrSeE/utsobN6N9vRvZN1sWGLSyaXvqgrXrigdw88TxO67lz7Bnks VVZLAhbmdSelDGI+yVDXkxumglWiUZEKnmS1Jp2MYlKzYPbGTgEXAPcydufjlrgW8kXm XIImVDSTg6uNtLkM8ZvLV8+RkB9/ZmWfVWb4wwW1DRN0wmRmMjCSIboHDWpEfuEwM7Aq yEiam8QTuSl/7PoUKXhDyZVA0JF49DiH81idGQqttSJydgfu3A1meQrVIm1aSHm5ZUJk UVhw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g15-20020a50d0cf000000b004537a3c4982si1726895edf.601.2022.09.21.03.23.02; Wed, 21 Sep 2022 03:23:28 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231597AbiIUJ0L (ORCPT + 99 others); Wed, 21 Sep 2022 05:26:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44346 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231599AbiIUJ0D (ORCPT ); Wed, 21 Sep 2022 05:26:03 -0400 Received: from mx.gpxsee.org (mx.gpxsee.org [37.205.14.76]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 940948F94C; Wed, 21 Sep 2022 02:25:53 -0700 (PDT) Received: from [192.168.4.25] (unknown [62.77.71.229]) by mx.gpxsee.org (Postfix) with ESMTPSA id 6BF41468C3; Wed, 21 Sep 2022 11:25:51 +0200 (CEST) Message-ID: Date: Wed, 21 Sep 2022 11:25:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.1.2 To: lizhi.hou@amd.com Cc: dmaengine@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, martin.tuma@digiteqautomotive.com, mchehab@kernel.org, michal.simek@xilinx.com, tumic@gpxsee.org, vkoul@kernel.org References: <19bd8ce4-2dde-e985-00f4-09b48decd3dc@amd.com> Subject: Re: [PATCH v2 2/3] Added Xilinx XDMA IP core driver Content-Language: en-US From: =?UTF-8?Q?Martin_T=c5=afma?= In-Reply-To: <19bd8ce4-2dde-e985-00f4-09b48decd3dc@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00,NICE_REPLY_A, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > Currently, the V3 patch series does not support register user logic > interrupt yet. This is a showstopper for almost every XDMA based PCIe card. As the driver "consumes" the whole register space (including the user IRQs enable/disable registers), there is AFAIK no way how to enable the user IRQs when this driver is loaded. > Could you convert your driver to use this? Not without the user IRQs. M.