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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id v9-20020aa799c9000000b00540d03f522fsm2304782pfi.66.2022.09.21.08.00.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Sep 2022 08:00:07 -0700 (PDT) Date: Wed, 21 Sep 2022 15:00:03 +0000 From: Sean Christopherson To: Gerd Hoffmann Cc: kvm@vger.kernel.org, Paolo Bonzini , Wanpeng Li , Vitaly Kuznetsov , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , "H. Peter Anvin" , "open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)" Subject: Re: [PATCH] kvm/x86: reserve bit KVM_HINTS_PHYS_ADDRESS_SIZE_DATA_VALID Message-ID: References: <20220908114146.473630-1-kraxel@redhat.com> <20220909050224.rzlt4x7tjrespw3k@sirius.home.kraxel.org> <20220921134246.xibospqoktp4wjie@sirius.home.kraxel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220921134246.xibospqoktp4wjie@sirius.home.kraxel.org> X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 21, 2022, Gerd Hoffmann wrote: > On Fri, Sep 09, 2022 at 07:02:24AM +0200, Gerd Hoffmann wrote: > > On Thu, Sep 08, 2022 at 02:52:36PM +0000, Sean Christopherson wrote: > > > On Thu, Sep 08, 2022, Gerd Hoffmann wrote: > > > > -#define KVM_HINTS_REALTIME 0 > > > > +#define KVM_HINTS_REALTIME 0 > > > > +#define KVM_HINTS_PHYS_ADDRESS_SIZE_DATA_VALID 1 > > > > > > Why does KVM need to get involved? This is purely a userspace problem. > > > > It doesn't. I only need reserve a hints bit, and the canonical source > > for that happens to live in the kernel. That's why this patch doesn't > > touch any actual code ;) The issue is that this "hint" effectively breaks other VMMs that already provide an accurate guest.MAXPHYADDR. > > > E.g. why not use QEMU's fw_cfg to communicate this information to the > > > guest? > > > > That is indeed the other obvious way to implement this. Given this > > information will be needed in code paths which already do CPUID queries > > using CPUID to transport that information looked like the better option > > to me. > > I'd like to move forward with this. > > So, any comment further comments and opinions? > Is it ok to grab a hints bit given the explanation above? > Or should I go for the fw_cfg approach? My strong preference is the fw_cfg approach, or if the guest side really wants to use CPUID, have QEMU define it's own CPUID signature and provide QEMU-specific hints/quirks that way.