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[34.168.104.7]) by smtp.gmail.com with ESMTPSA id jo18-20020a170903055200b00176a2d23d1asm2255751plb.56.2022.09.21.09.23.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Sep 2022 09:23:15 -0700 (PDT) Date: Wed, 21 Sep 2022 16:23:11 +0000 From: Sean Christopherson To: Vitaly Kuznetsov Cc: kvm@vger.kernel.org, Paolo Bonzini , Wanpeng Li , Jim Mattson , Michael Kelley , Siddharth Chandrasekaran , Yuan Yao , Maxim Levitsky , linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v10 02/39] KVM: x86: hyper-v: Resurrect dedicated KVM_REQ_HV_TLB_FLUSH flag Message-ID: References: <20220921152436.3673454-1-vkuznets@redhat.com> <20220921152436.3673454-3-vkuznets@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220921152436.3673454-3-vkuznets@redhat.com> X-Spam-Status: No, score=-17.6 required=5.0 tests=BAYES_00,DKIMWL_WL_MED, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, ENV_AND_HDR_SPF_MATCH,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS, USER_IN_DEF_DKIM_WL,USER_IN_DEF_SPF_WL autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 21, 2022, Vitaly Kuznetsov wrote: > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index f62d5799fcd7..86504a8bfd9a 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -3418,11 +3418,17 @@ static inline void kvm_vcpu_flush_tlb_current(struct kvm_vcpu *vcpu) > */ > void kvm_service_local_tlb_flush_requests(struct kvm_vcpu *vcpu) > { > - if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu)) > + if (kvm_check_request(KVM_REQ_TLB_FLUSH_CURRENT, vcpu)) { > kvm_vcpu_flush_tlb_current(vcpu); > + kvm_clear_request(KVM_REQ_HV_TLB_FLUSH, vcpu); This isn't correct, flush_tlb_current() flushes "host" TLB entries, i.e. guest-physical mappings in Intel terminology, where flush_tlb_guest() and (IIUC) Hyper-V's paravirt TLB flush both flesh "guest" TLB entries, i.e. linear and combined mappings. Amusing side topic, apparently I like arm's stage-2 terminology better than "TDP", because I actually typed out "stage-2" first. > + } > > - if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu)) > + if (kvm_check_request(KVM_REQ_TLB_FLUSH_GUEST, vcpu)) { > + kvm_vcpu_flush_tlb_guest(vcpu); > + kvm_clear_request(KVM_REQ_HV_TLB_FLUSH, vcpu); > + } else if (kvm_check_request(KVM_REQ_HV_TLB_FLUSH, vcpu)) { > kvm_vcpu_flush_tlb_guest(vcpu); > + } > } > EXPORT_SYMBOL_GPL(kvm_service_local_tlb_flush_requests); > > -- > 2.37.3 >