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[2620:137:e000::1:20]) by mx.google.com with ESMTP id du19-20020a17090772d300b007821bf66b77si2179358ejc.241.2022.09.21.16.08.44; Wed, 21 Sep 2022 16:09:11 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=fail header.i=@rivosinc-com.20210112.gappssmtp.com header.s=20210112 header.b=eM8rXH1Y; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229974AbiIUVrU (ORCPT + 99 others); Wed, 21 Sep 2022 17:47:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50356 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229969AbiIUVrR (ORCPT ); Wed, 21 Sep 2022 17:47:17 -0400 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E153A6AFF for ; Wed, 21 Sep 2022 14:47:15 -0700 (PDT) Received: by mail-pf1-x42a.google.com with SMTP id l65so7303399pfl.8 for ; Wed, 21 Sep 2022 14:47:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc-com.20210112.gappssmtp.com; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=a9YZZj3lGUqe+IwHRLjiPb6pN/UWuamlTiBoCYoLPmI=; b=eM8rXH1YNLqnI3aZCrzM5BieJX3ga8duNSoe/8R5upRbhLPRd3MoHhOKs4r0GxEAqr pXpOPdfWgJrJWqJUAX8niFvqVNe5quwQUBoqleWQvk27EHeKkl885UO2oskB3f5asvIJ CZtwCokZz6WhyvpeOg/ipE2OWvmXVyYlPFjt+6CWcGhggNEbjBBKMv6cQ1+fiEK4MK5J 1S2oYNmIYq+XpfbvdMUuI7ZSmvogwAeUIOpWfMY63z1z755SIPzSMOsoouU1fOxvP8eu p7dtlmVeQ3ZtamhVH/YnVjP5exxi7qKGEqIUyz2NTKGb5Gz1IwCqpphu6l7QKfUjzr/x doxQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=a9YZZj3lGUqe+IwHRLjiPb6pN/UWuamlTiBoCYoLPmI=; b=mfYdJ8/9eEDC0KBjJKsz0Ome9LioVh3+i+RDTcXWXEuSTho6WN+31WFCmBJmVzv+2V P4RgmsweUjZ7uiGjrrh86Mmp06uzZN2w3/Hzrz+x9HPOhKCTQqeLJ0OIznhy6YbA2mff /LBUKXKoHgwe2i4fH1oqUwzSttvUAbawa3cmT8eAB+a8b2HAcsziwM57B1b0bbANyyjZ FJvzwGx8NNkkiywDL8GRP3U4fjJWs4t4jZXkE0JFTL3HeALsbjHVWt7OrRGMgcDJRfUF LfYBLWDfk1i6SgIGxKDlPSWLlknMQcvjwwDJ0dKcBS/RxjqQdp1pkRSBqapSe3wNW/ec laJA== X-Gm-Message-State: ACrzQf2yM61BXRLS5d+E3TUNzVMOEQXU7V6V6ECSzdsGJmGTLhDnLHo5 aTeeVezO0elB9e2D9W9pkkYWOw== X-Received: by 2002:a62:3808:0:b0:543:8e90:2810 with SMTP id f8-20020a623808000000b005438e902810mr172763pfa.45.1663796834851; Wed, 21 Sep 2022 14:47:14 -0700 (PDT) Received: from stillson.ba.rivosinc.com ([66.220.2.162]) by smtp.gmail.com with ESMTPSA id k7-20020aa79727000000b005484d133127sm2634536pfg.129.2022.09.21.14.47.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 21 Sep 2022 14:47:14 -0700 (PDT) From: Chris Stillson Cc: Guo Ren , Greentime Hu , Paul Walmsley , Palmer Dabbelt , Albert Ou , Eric Biederman , Kees Cook , Anup Patel , Atish Patra , Oleg Nesterov , Guo Ren , Heinrich Schuchardt , Arnaud Pouliquen , Chris Stillson , Paolo Bonzini , Qinglin Pan , Alexandre Ghiti , Vincent Chen , Arnd Bergmann , Heiko Stuebner , Jisheng Zhang , Dao Lu , "Peter Zijlstra (Intel)" , Sunil V L , Han-Kuan Chen , Changbin Du , Li Zhengyu , Alexander Graf , Ard Biesheuvel , Tsukasa OI , Yury Norov , Frederic Weisbecker , Mark Rutland , Myrtle Shah , Vitaly Wool , Mathieu Desnoyers , Catalin Marinas , Mark Brown , Will Deacon , Heiko Carstens , Huacai Chen , Alexey Dobriyan , Janosch Frank , Christian Brauner , Evgenii Stepanov , Peter Collingbourne , Eugene Syromiatnikov , Colin Cross , Andrew Morton , Suren Baghdasaryan , Barret Rhoden , Davidlohr Bueso , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org, kvm@vger.kernel.org, kvm-riscv@lists.infradead.org Subject: [PATCH v12 04/17] riscv: Add vector feature to compile Date: Wed, 21 Sep 2022 14:43:46 -0700 Message-Id: <20220921214439.1491510-4-stillson@rivosinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220921214439.1491510-1-stillson@rivosinc.com> References: <20220921214439.1491510-1-stillson@rivosinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Guo Ren This patch adds a new config option which could enable assembler's vector feature. Signed-off-by: Guo Ren Co-developed-by: Greentime Hu Signed-off-by: Greentime Hu --- arch/riscv/Kconfig | 15 +++++++++++++-- arch/riscv/Makefile | 1 + 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ed66c31e4655..e294d85bfb7d 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -432,7 +432,17 @@ config FPU If you don't know what to do here, say Y. -endmenu # "Platform type" +config VECTOR + bool "VECTOR support" + depends on GCC_VERSION >= 120000 || CLANG_VERSION >= 130000 + default n + help + Say N here if you want to disable all vector related procedure + in the kernel. + + If you don't know what to do here, say Y. + +endmenu menu "Kernel features" @@ -556,6 +566,7 @@ config CMDLINE_EXTEND cases where the provided arguments are insufficient and you don't want to or cannot modify them. + config CMDLINE_FORCE bool "Always use the default kernel command string" help @@ -648,7 +659,7 @@ config XIP_PHYS_ADDR be linked for and stored to. This address is dependent on your own flash usage. -endmenu # "Boot options" +endmenu config BUILTIN_DTB bool diff --git a/arch/riscv/Makefile b/arch/riscv/Makefile index 3fa8ef336822..1ec17f3d6d09 100644 --- a/arch/riscv/Makefile +++ b/arch/riscv/Makefile @@ -50,6 +50,7 @@ riscv-march-$(CONFIG_ARCH_RV32I) := rv32ima riscv-march-$(CONFIG_ARCH_RV64I) := rv64ima riscv-march-$(CONFIG_FPU) := $(riscv-march-y)fd riscv-march-$(CONFIG_RISCV_ISA_C) := $(riscv-march-y)c +riscv-march-$(CONFIG_VECTOR) := $(riscv-march-y)v # Newer binutils versions default to ISA spec version 20191213 which moves some # instructions from the I extension to the Zicsr and Zifencei extensions. -- 2.25.1