Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp486931rwb; Thu, 22 Sep 2022 02:23:11 -0700 (PDT) X-Google-Smtp-Source: AMsMyM50QHRCdYVQycKCUpLoz8t6luO5bdu9DaefqWBlIrqRBdwrIrfpC4V6GtaFL+5lPdQnB533 X-Received: by 2002:a17:90b:1c8c:b0:203:89fb:ba79 with SMTP id oo12-20020a17090b1c8c00b0020389fbba79mr14237747pjb.92.1663838590992; Thu, 22 Sep 2022 02:23:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663838590; cv=none; d=google.com; s=arc-20160816; b=xM2F8VXyDxgmSA4dNZrmBDZIkdUbDfCB0ZRe03rEaEhO5DptEt/ILMF11OuH3fqtSx iekZp50LTi4brJ5sOig/XmuptUT0ESk//3clcWDxcw8+ZWcga1YWOWM3vB7YKDvzdlrl JOfn44DzGVhAchPX6RneZZw5hu3sOMi4bVYXP4VioJWsnF5NDgJMTcHj8/xvmEDNf1w2 GYbLnlkbU36ywafza9vMeTjONNxrHaUfMNhJpYyc/061Gpa1xDo/Tx016gV9+n9er92S RVzJ/NSHATJO7sdBHmX/+momjsDBphkM1od/S3VuM0/yb2UPZkc1LHUo8bg+cwCa5swW IWIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=13hxr6W+QcX4UHmVrUqJocteKF15icvHoANjzCJxFMI=; b=W+SkF3Nn7CAFOQr8d93PJH/F7TCZbgPi1CeR+EmSxKvJJFjcuy9vGgcCQ6g290bHqp ek6PL/wS+vzODWXC/ZcH7zXCgSzQGOjM/rUPMW0u0JGdXf7eJcnlF+XKSLFzDGGV0G1z ZDrtQeZfrDeg4NKK+DHX7F+49aA2Qt/Lx6U5g0l/0n5vdShJ+WKqc0GsvLDb6pnpcj8W taEVdRGAr/DRFu7mBvr2T0km/OiuWkcQwTppJxnPciyFhVEeQxe/poY33OkwiLYB0VkS V2X15vagi0qG6z0acE2lSrqOvHtSNEvBRPPN8/wu1hy5JJPs2p+ooF2sRpuzso4kUB+W IVRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=GvgUWBol; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id s124-20020a637782000000b004388952d5a6si5498643pgc.581.2022.09.22.02.22.59; Thu, 22 Sep 2022 02:23:10 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=GvgUWBol; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230126AbiIVJTe (ORCPT + 99 others); Thu, 22 Sep 2022 05:19:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57136 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230360AbiIVJTG (ORCPT ); Thu, 22 Sep 2022 05:19:06 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C87F7D07AE; Thu, 22 Sep 2022 02:19:03 -0700 (PDT) X-UUID: f8ac069419b04fe390b28f048afa9e65-20220922 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=13hxr6W+QcX4UHmVrUqJocteKF15icvHoANjzCJxFMI=; b=GvgUWBolqGB4els7HsE418HUEn3KavK42+EtlpH405jzF58NRypxbETLWTY+r+amRR5uJAC0DI1z8Rq9GTkFsWJdffyyu65it8gKzoZDyZdmQcZBwHQxSEE1X1oxLdeVwj8Zb/0x+hb/Kp81w9+NiZ53YCmuuPeUGioVp30zYv0=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:49c8fcca-2aea-409b-9b4d-6a2b2d8a188c,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:39a5ff1,CLOUDID:2317e0e3-87f9-4bb0-97b6-34957dc0fbbe,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,U RL:0,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: f8ac069419b04fe390b28f048afa9e65-20220922 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 687648322; Thu, 22 Sep 2022 17:19:01 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Thu, 22 Sep 2022 17:18:59 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Thu, 22 Sep 2022 17:18:59 +0800 From: Miles Chen To: Stephen Boyd , Michael Turquette , Matthias Brugger CC: , AngeloGioacchino Del Regno , Chen-Yu Tsai , Chun-Jie Chen , Miles Chen , , , Subject: [PATCH 5/7] clk: mediatek: mt6797: use mtk_clk_simple_probe to simplify driver Date: Thu, 22 Sep 2022 17:18:33 +0800 Message-ID: <20220922091841.4099-6-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220922091841.4099-1-miles.chen@mediatek.com> References: <20220922091841.4099-1-miles.chen@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY,URIBL_CSS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org mtk_clk_simple_probe was added by Chun-Jie to simply common flow of MediaTek clock drivers and ChenYu enhanced the error path of mtk_clk_simple_probe and added mtk_clk_simple_remove. Let's use mtk_clk_simple_probe and mtk_clk_simple_probe in other MediaTek clock drivers as well. Signed-off-by: Miles Chen Reviewed-by: AngeloGioacchino Del Regno --- drivers/clk/mediatek/clk-mt6797-img.c | 36 ++++++++++---------------- drivers/clk/mediatek/clk-mt6797-vdec.c | 36 ++++++++++---------------- drivers/clk/mediatek/clk-mt6797-venc.c | 36 ++++++++++---------------- 3 files changed, 39 insertions(+), 69 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt6797-img.c b/drivers/clk/mediatek/clk-mt6797-img.c index 25d17db13bac..7c6a53fbb8be 100644 --- a/drivers/clk/mediatek/clk-mt6797-img.c +++ b/drivers/clk/mediatek/clk-mt6797-img.c @@ -32,33 +32,23 @@ static const struct mtk_gate img_clks[] = { GATE_IMG(CLK_IMG_LARB6, "img_larb6", "mm_sel", 0), }; -static const struct of_device_id of_match_clk_mt6797_img[] = { - { .compatible = "mediatek,mt6797-imgsys", }, - {} +static const struct mtk_clk_desc img_desc = { + .clks = img_clks, + .num_clks = ARRAY_SIZE(img_clks), }; -static int clk_mt6797_img_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node = pdev->dev.of_node; - - clk_data = mtk_alloc_clk_data(CLK_IMG_NR); - - mtk_clk_register_gates(node, img_clks, ARRAY_SIZE(img_clks), - clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} +static const struct of_device_id of_match_clk_mt6797_img[] = { + { + .compatible = "mediatek,mt6797-imgsys", + .data = &img_desc, + }, { + /* sentinel */ + } +}; static struct platform_driver clk_mt6797_img_drv = { - .probe = clk_mt6797_img_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt6797-img", .of_match_table = of_match_clk_mt6797_img, diff --git a/drivers/clk/mediatek/clk-mt6797-vdec.c b/drivers/clk/mediatek/clk-mt6797-vdec.c index de857894e033..6120fccc859f 100644 --- a/drivers/clk/mediatek/clk-mt6797-vdec.c +++ b/drivers/clk/mediatek/clk-mt6797-vdec.c @@ -49,33 +49,23 @@ static const struct mtk_gate vdec_clks[] = { GATE_VDEC1(CLK_VDEC_LARB1_CKEN, "vdec_larb1_cken", "mm_sel", 0), }; -static const struct of_device_id of_match_clk_mt6797_vdec[] = { - { .compatible = "mediatek,mt6797-vdecsys", }, - {} +static const struct mtk_clk_desc vdec_desc = { + .clks = vdec_clks, + .num_clks = ARRAY_SIZE(vdec_clks), }; -static int clk_mt6797_vdec_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node = pdev->dev.of_node; - - clk_data = mtk_alloc_clk_data(CLK_VDEC_NR); - - mtk_clk_register_gates(node, vdec_clks, ARRAY_SIZE(vdec_clks), - clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} +static const struct of_device_id of_match_clk_mt6797_vdec[] = { + { + .compatible = "mediatek,mt6797-vdecsys", + .data = &vdec_desc, + }, { + /* sentinel */ + } +}; static struct platform_driver clk_mt6797_vdec_drv = { - .probe = clk_mt6797_vdec_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt6797-vdec", .of_match_table = of_match_clk_mt6797_vdec, diff --git a/drivers/clk/mediatek/clk-mt6797-venc.c b/drivers/clk/mediatek/clk-mt6797-venc.c index 78b7ed55f979..834d3834d2bb 100644 --- a/drivers/clk/mediatek/clk-mt6797-venc.c +++ b/drivers/clk/mediatek/clk-mt6797-venc.c @@ -34,33 +34,23 @@ static const struct mtk_gate venc_clks[] = { GATE_VENC(CLK_VENC_3, "venc_3", "venc_sel", 12), }; -static const struct of_device_id of_match_clk_mt6797_venc[] = { - { .compatible = "mediatek,mt6797-vencsys", }, - {} +static const struct mtk_clk_desc venc_desc = { + .clks = venc_clks, + .num_clks = ARRAY_SIZE(venc_clks), }; -static int clk_mt6797_venc_probe(struct platform_device *pdev) -{ - struct clk_hw_onecell_data *clk_data; - int r; - struct device_node *node = pdev->dev.of_node; - - clk_data = mtk_alloc_clk_data(CLK_VENC_NR); - - mtk_clk_register_gates(node, venc_clks, ARRAY_SIZE(venc_clks), - clk_data); - - r = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, clk_data); - if (r) - dev_err(&pdev->dev, - "could not register clock provider: %s: %d\n", - pdev->name, r); - - return r; -} +static const struct of_device_id of_match_clk_mt6797_venc[] = { + { + .compatible = "mediatek,mt6797-vencsys", + .data = &venc_desc, + }, { + /* sentinel */ + } +}; static struct platform_driver clk_mt6797_venc_drv = { - .probe = clk_mt6797_venc_probe, + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, .driver = { .name = "clk-mt6797-venc", .of_match_table = of_match_clk_mt6797_venc, -- 2.18.0