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From:   Fenglin Wu <quic_fenglinw@quicinc.com>
To:     <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <sboyd@kernel.org>
CC:     <quic_collinsd@quicinc.com>, <quic_subbaram@quicinc.com>,
        <quic_fenglinw@quicinc.com>
Subject: [PATCH v1 0/2] Add changes to support SPMI resource protection
Date:   Fri, 23 Sep 2022 15:49:37 +0800
Message-ID: <20220923074939.2592244-1-quic_fenglinw@quicinc.com>
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If a secure VM uses the SPMI PMIC arbiter driver to access PMIC modules
with secure access, such as in a trust UI feature when the secure VM is
accessing PMIC modules that supply to display power rails, the display
driver in primary VM (no-secure) needs to translate the SPMI address of
the PMIC modules and get the corresponding physical SoC register range
within the SPMI PMIC arbiter that is used to initiate SPMI write transactions,
and lend the memory range to the secure VM via a hypervisor call to prevent
any SPMI access to these modules from the non-secure VM. Hence, an API for
such SPMI address translation is added and exported.

Further, the secure-VM that loads the SPMI PMIC arbiter driver can't specify
the PMIC arbiter HLOS EE summary IRQ becuase it can't have the permission,
also the secure VM has no needs to use the PMIC modules interrupt, hence add
a change to make the interrupt support optional for the secure-VM to specify
the PMIC arbiter device node without interrupt support. The driver change has
a binding document change which has already been applied:
https://lore.kernel.org/all/YmxnIQ9niVbyASfN@robh.at.kernel.org/

David Collins (2):
  spmi: pmic-arb: add support to map SPMI addresses to physical addr
  spmi: pmic-arb: make interrupt support optional

 drivers/spmi/spmi-pmic-arb.c           | 149 ++++++++++++++++++++++---
 include/linux/soc/qcom/spmi-pmic-arb.h |  23 ++++
 2 files changed, 155 insertions(+), 17 deletions(-)
 create mode 100644 include/linux/soc/qcom/spmi-pmic-arb.h

-- 
2.25.1