Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp900636rwb; Fri, 23 Sep 2022 05:49:44 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6CCD8eALYlH9LPzfcitxd76Pl/gWdxrX01DPVMIIh0Xs5MNNO0/EdIxFj4JX/pnrqXcAm3 X-Received: by 2002:a05:6402:3547:b0:451:3be6:d55b with SMTP id f7-20020a056402354700b004513be6d55bmr8144775edd.57.1663937384353; Fri, 23 Sep 2022 05:49:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663937384; cv=none; d=google.com; s=arc-20160816; b=YlA9/NIRtp3LEkRAXOuOhcBE9rl4PyQvxJ4UB8LnoHehT6LqjEvDa/wrN2V5CIN3ze 2+5eESsYKrS4NvbYqLL7sdW/7DLTjBGDzPKz7cff4KzO/007UYTzVsXPeANItUBdpDxS uqtflLlrPwqcLn6cXl6lDh1drromTiYGzUchR4Q1oHBpx+VjvEjsLyGwMZkzbvbUbzvB eleIYntv0IbeyWiyh1Rlx2PvCWFR/mMNCKD+c4umXcJzrVz1d0FHbnzINh6xOMqHQv92 JgvNGX3KxvnL3C7YoDTUU7d6YEvPIkr30QYjJex7jXkRBPi0UDPuFYgCSn0wVf2frDEE 33hQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=pJBCyBtfgk5lMDRW+VzYoLoFmvLOr5j+hW242nlHXfg=; b=shV9Nf9BmPclH0wst3IgJA2fvPH4oDSIvyiT7I0RvF3nzE0fObyXfHLm1HU5GF4Mtj OcHaeZR/dSQNE8u6gkvMEG4bTc+SOMBlPblZSCQ+MhaURYMyi4Il/MBWvvHZRiYNSqsP 9br4EJhZHrTh0PAOgMRV3W+90lTho2YyueZLufl7Ir4P10nR103OrpYBBhdIKFTt0gax 4CQl2X43jH6vgevxQA/M+wIP5qa1h9b8/vqV535RimOWw21iUKvUCGw/NtD8KU4vUteD FcX2aEV4dPlufIPZEXEHEtygMdHwL2utvse5HFU/7MvefbJmckzjPWouqLuwXLvP/O1v mQzA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id g22-20020a1709065d1600b0077f4fcfe49csi9800955ejt.905.2022.09.23.05.49.17; Fri, 23 Sep 2022 05:49:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232084AbiIWM1E (ORCPT + 99 others); Fri, 23 Sep 2022 08:27:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48966 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230520AbiIWM0m (ORCPT ); Fri, 23 Sep 2022 08:26:42 -0400 Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id D0A83135046 for ; Fri, 23 Sep 2022 05:22:45 -0700 (PDT) Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id 28NCIU7x016687; Fri, 23 Sep 2022 07:18:30 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id 28NCITHi016686; Fri, 23 Sep 2022 07:18:29 -0500 X-Authentication-Warning: gate.crashing.org: segher set sender to segher@kernel.crashing.org using -f Date: Fri, 23 Sep 2022 07:18:29 -0500 From: Segher Boessenkool To: Nicholas Piggin Cc: Christophe Leroy , Michael Ellerman , linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH] powerpc/irq: Modernise inline assembly in irq_soft_mask_{set,return} Message-ID: <20220923121829.GL25951@gate.crashing.org> References: <178f30ff62c0317061f019b3dbbc079073f104c3.1663656058.git.christophe.leroy@csgroup.eu> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_PASS, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 23, 2022 at 05:08:13PM +1000, Nicholas Piggin wrote: > On Tue Sep 20, 2022 at 4:41 PM AEST, Christophe Leroy wrote: > > local_paca is declared as global register asm("r13"), it is therefore > > garantied to always ever be r13. > > > > It is therefore not required to opencode r13 in the assembly, use > > a reference to local_paca->irq_soft_mask instead. > The code matches the changelog AFAIKS. But I don't know where it is > guaranteed it will always be r13 in GCC and Clang. I still don't know > where in the specification or documentation suggests this. "Global Register Variables" in the GCC manual. > There was some assertion it would always be r13, but that can't be a > *general* rule. e.g., the following code: > > struct foo { > #ifdef BIGDISP > int array[1024*1024]; > #endif > char bar; > }; > > register struct foo *foo asm("r13"); > > static void setval(char val) > { > asm("stb%X0 %1,%0" : "=m" (foo->bar) : "r" (val)); > } > > int main(void) > { > setval(10); > } Just use r13 directly in the asm, if that is what you want! > With -O0 this generates stb 9,0(10) for me for GCC 12, and with -O2 > -DBIGDISP it generates stb 10,0(9). So that makes me nervious. GCC > does not have some kind of correctness guarantee here, so it must not > have this in its regression tests etc., and who knows about clang. GCC has all kinds of correctness guarantees, here and elsewhere, that is 90% of a compiler's job. But you don't *tell* it what you consider "correct" here. You wrote "foo->bar", and this expression was translated to something that derived from r13. If you made the asm something like asm("stb%X0 %1,0(%0)" : : "r" (foo), "r" (val) : "memory"); it would work fine. It would also work fine if you wrote 13 in the template directly. These things follow the rules, so are guaranteed. The most important pieces of doc here may be * Accesses to the variable may be optimized as usual and the register remains available for allocation and use in any computations, provided that observable values of the variable are not affected. * If the variable is referenced in inline assembly, the type of access must be provided to the compiler via constraints (*note Constraints::). Accesses from basic asms are not supported. but read the whole "Global Register Variables" chapter? > If it is true for some particular subset of cases that we can guarantee, > e.g., using -O2 and irq_soft_mask offset within range of stb offset and > we can point to specification such that both GCC and Clang will follow > it, then okay. Otherwise I still think it's more trouble than it is > worth. -O2 makes it much more likely some inline assembler things work as intended, but it guarantees nothing. Sorry. Segher