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Subject: Re: [PATCHv8 00/11] Linear Address Masking enabling
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To:     Ashok Raj <ashok.raj@intel.com>
Cc:     Jason Gunthorpe <jgg@nvidia.com>,
        "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com>,
        Jacob Pan <jacob.jun.pan@intel.com>,
        "Kirill A. Shutemov" <kirill@shutemov.name>,
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        Andrey Ryabinin <ryabinin.a.a@gmail.com>,
        Andrey Konovalov <andreyknvl@gmail.com>,
        Alexander Potapenko <glider@google.com>,
        Taras Madan <tarasmadan@google.com>,
        Dmitry Vyukov <dvyukov@google.com>,
        "H . J . Lu" <hjl.tools@gmail.com>,
        Andi Kleen <ak@linux.intel.com>,
        Rick Edgecombe <rick.p.edgecombe@intel.com>,
        linux-mm@kvack.org, linux-kernel@vger.kernel.org,
        Joerg Roedel <joro@8bytes.org>
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On 9/23/22 08:44, Ashok Raj wrote:
>> But, the point that Kirill and I were getting at is still that devices
>> *have* a role to play here.  The idea that this can be hidden at the
>> IOMMU layer is pure fantasy.  Right?
> If you *can't* send tagged memory to the device, what is the
> role the device need to play? 
> 
> For now you can only send proper VA's that are canonical. 

Today, yes, you have to keep tagged addresses away from devices.  They
must be sequestered in a place that only the CPU can find them.

The observation that Kirill and I had is that there are thing that are
done solely on the device today -- like accessing a translated address
twice -- without IOMMU involvement.  We were trying to figure out how
that would work in the future once tagged addresses are exposed to
devices and they implement all the new PCI magic.

After our private chat, I think the answer is that devices *have* a role
to play.  Device-side logic must know how to untag memory before asking
for translation or even *deciding* to ask for address translation.  But,
hopefully, the communicating that untagging information to the device
will be done in a device-agnostic, standardized way, just how PASIDs or
ATS are handled today.