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[2620:137:e000::1:20]) by mx.google.com with ESMTP id d12-20020a63f24c000000b00439ae52d015si13770347pgk.306.2022.09.24.08.50.16; Sat, 24 Sep 2022 08:50:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=nDAwQxTW; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233829AbiIXP3E (ORCPT + 99 others); Sat, 24 Sep 2022 11:29:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45234 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233790AbiIXP2k (ORCPT ); Sat, 24 Sep 2022 11:28:40 -0400 Received: from relay5-d.mail.gandi.net (relay5-d.mail.gandi.net [217.70.183.197]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 398FFA7A8C; Sat, 24 Sep 2022 08:28:39 -0700 (PDT) Received: (Authenticated sender: paul.kocialkowski@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 797301C0004; Sat, 24 Sep 2022 15:28:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1664033317; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=aqr+73QF+KcAToJwE6yKo6ZCzrB6161goSgjB/7oNOw=; b=nDAwQxTW0jDqbFUMrKlnofrEU60u5ZRHgA+LKP1wKx5IQJ2MkllndKvq/5f7Fpb3kr66Ts ROgvkdjDPvMCBO30HRPo2Ilo3d9GJQfGd6M65TesLO07XrjZd4deHHDsOnD8st+eW0AVrq stz+Rvh6ejhAZOeGcftY159YZ8U9+MA9+m0m+r2cIGtbukywEgYBgkZ9JfBVLdmyDfTbsO c7INmeOgjw1zeIqr8mdb5BEPJDhizGvgrAB71ZL5Yarjr8LlhLF9FG6jWsOe8M3e+Mtsxw gdo/AHZ9GL2KpvnKZBhgR8aAV/ZWnXHlGcgDzs/OIQjPC3U6t+ZVMRGrGHHYHw== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org Cc: Rob Herring , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Frank Rowand , Maxime Ripard , Laurent Pinchart , Thomas Petazzoni , Paul Kocialkowski Subject: [PATCH v6 6/7] ARM: dts: sun8i-a83t: Add BananaPi M3 OV5640 camera overlay Date: Sat, 24 Sep 2022 17:28:19 +0200 Message-Id: <20220924152820.77149-7-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> References: <20220924152820.77149-1-paul.kocialkowski@bootlin.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add an overlay supporting the OV5640 from the BananaPi Camera v3 peripheral board. The board has two sensors (OV5640 and OV8865) which cannot be supported in parallel as they share the same reset pin and the kernel currently has no support for this case. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/Makefile | 1 + .../sun8i-a83t-bananapi-m3-camera-ov5640.dts | 117 ++++++++++++++++++ 2 files changed, 118 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov5640.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 05d8aef6e5d2..1f1173efeb14 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1339,6 +1339,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a33-sinlinx-sina33.dtb \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-bananapi-m3.dtb \ + sun8i-a83t-bananapi-m3-camera-ov5640.dtbo \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dtb \ sun8i-h2-plus-bananapi-m2-zero.dtb \ diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov5640.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov5640.dts new file mode 100644 index 000000000000..5868ef11bdee --- /dev/null +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3-camera-ov5640.dts @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright 2022 Bootlin + * Author: Paul Kocialkowski + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + /* + * These regulators actually have DLDO4 tied to their EN pin, which is + * described as input supply here for lack of a better representation. + * Their actual supply is PS, which is always-on. + */ + + ov5640_avdd: ov5640-avdd { + compatible = "regulator-fixed"; + regulator-name = "ov5640-avdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + ov5640_dovdd: ov5640-dovdd { + compatible = "regulator-fixed"; + regulator-name = "ov5640-dovdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + ov5640_dvdd: ov5640-dvdd { + compatible = "regulator-fixed"; + regulator-name = "ov5640-dvdd"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + vin-supply = <®_dldo4>; + }; +}; + +&csi { + pinctrl-names = "default"; + pinctrl-0 = <&csi_8bit_parallel_pins>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + csi_in_ov5640: endpoint { + remote-endpoint = <&ov5640_out_csi>; + bus-width = <8>; + data-shift = <2>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <1>; + }; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pe_pins>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + ov5640: camera@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + + clocks = <&ccu CLK_CSI_MCLK>; + clock-names = "xclk"; + assigned-clocks = <&ccu CLK_CSI_MCLK>; + assigned-clock-parents = <&osc24M>; + assigned-clock-rates = <24000000>; + + AVDD-supply = <&ov5640_avdd>; + DOVDD-supply = <&ov5640_dovdd>; + DVDD-supply = <&ov5640_dvdd>; + + powerdown-gpios = <&pio 3 15 GPIO_ACTIVE_HIGH>; /* PD15 */ + reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + + rotation = <180>; + + port { + ov5640_out_csi: endpoint { + remote-endpoint = <&csi_in_ov5640>; + bus-width = <8>; + data-shift = <2>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <1>; + }; + }; + }; +}; + +&pio { + pinctrl-names = "default"; + pinctrl-0 = <&csi_mclk_pin>; +}; + +®_dldo4 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; +}; -- 2.37.3