Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20;
From:   Colin Foster <colin.foster@in-advantage.com>
To:     linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, netdev@vger.kernel.org
Cc:     Russell King <linux@armlinux.org.uk>,
        Linus Walleij <linus.walleij@linaro.org>,
        UNGLinuxDriver@microchip.com,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        Claudiu Manoil <claudiu.manoil@nxp.com>,
        Lee Jones <lee@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Paolo Abeni <pabeni@redhat.com>,
        Jakub Kicinski <kuba@kernel.org>,
        Eric Dumazet <edumazet@google.com>,
        "David S. Miller" <davem@davemloft.net>,
        Vladimir Oltean <olteanv@gmail.com>,
        Florian Fainelli <f.fainelli@gmail.com>,
        Vivien Didelot <vivien.didelot@gmail.com>,
        Andrew Lunn <andrew@lunn.ch>
Subject: [PATCH v3 net-next 11/14] mfd: ocelot: add regmaps for ocelot_ext
Date:   Sun, 25 Sep 2022 17:29:25 -0700
Message-Id: <20220926002928.2744638-12-colin.foster@in-advantage.com>
In-Reply-To: <20220926002928.2744638-1-colin.foster@in-advantage.com>
References: <20220926002928.2744638-1-colin.foster@in-advantage.com>
Content-Transfer-Encoding: 8bit
Content-Type: text/plain
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?/fnGFz7+9HYuzcLdZ5NoJSEEshoB8aiQh05VcBNZXkZ7nUE8JkmkZCzociK1?=
 =?us-ascii?Q?bkE/wcGxxJ+LhquySzsL0jzlXitcU2ojHFFkVBeeurAWce21aXRNB0YY22S8?=
 =?us-ascii?Q?9Vq89QHHNDQ9yW9c40hp4p8OV9gNdf4xaKN9pn/pTKGVYwYl2KJqhzE4nijx?=
 =?us-ascii?Q?+mFcZCl//t8n49f7JogXeHxj+o/WXOzYazpmv80/4vZou9HCLco1gf3rmz2O?=
 =?us-ascii?Q?BGCiTMYXheJmvfU+dZqUSU7p28+ZYamdTHehImR0lwSj+iyutC99kA6S9Hic?=
 =?us-ascii?Q?/XBQj49UP+Uoq2Hsl7tEZ2ibNvewpy5ecbvHAwDNEMrbfRmKVbHeaYEm1mwD?=
 =?us-ascii?Q?owcP1fziDdftaOqMXQFxx8W4MbdVQp7Uqcg4DbU9TB1bo2xP4sPOAAd1wmep?=
 =?us-ascii?Q?NfxyY4zaRL+uslbSLlrIzli+6AiNi+QDtlrD6QC0ggCif6+fBtuByqw1Cy7+?=
 =?us-ascii?Q?NFsoHZHt9rOqrVjFJhicI3Ih96FK0FtrOtXoHIRwLALGbMC17qzO+p4039SG?=
 =?us-ascii?Q?nOhrKoRvvwHb/v9NB74NpnRU2HbrxaoAaAzT6bj5iM8GLCiQ0501HhJISx7Q?=
 =?us-ascii?Q?3yD3k6BJuCcrqrQMiFC3bj0uNXYkupRqPrVwjJXOE/AIHTgRhJgH2mLJiUu7?=
 =?us-ascii?Q?9R3NZsEuvDJgkfLsvGVtUyN15ihQO3VopVxpV7Ck3qcxt4RmR/vtTJcjylJs?=
 =?us-ascii?Q?H8CBxXPTKb+rD7chMVHgMVLoEVTmvGAoIkd9bbWpl6arpKrVG5Otlhd2uciK?=
 =?us-ascii?Q?RSehiEyfHfL+9iXxFQCXMsR92j88hMFNhGVrvcHDmgXZnqVs0XPXdsof8s4m?=
 =?us-ascii?Q?dGhEqVb8oy+yjwrmVBhIIoVOYDM64jNHnlYTvIY/3Fu4ERVv6BwrlRmodPiK?=
 =?us-ascii?Q?haO7NZCQn37KBE6tk7KiVHI7qxKV+fljmkfw/Az2k1qd8loCU0zve/E72zEZ?=
 =?us-ascii?Q?kTvGcfzkDXargZ6o2KeLbrJM+rKuuN8EoL3iWQn64TJZFKfd1iYN2ta8GC+k?=
 =?us-ascii?Q?cjapSGQdp5ViMz/s0UiCvE2xIo0YvP1jYouphyHM2ynbQmJ8DolCpGhKAmc6?=
 =?us-ascii?Q?13sREgbw+tDTk560q2OyySYql3+tDRJxsqHcP1WTRU+IQMAQOieddTC2DFZQ?=
 =?us-ascii?Q?4Ix3UcUuOHFE8rWOUjiG1CCvCwG6mzYlZSr9kn2l1/qlC3BZTSsbQ0rnB+PB?=
 =?us-ascii?Q?IODJ2Mu5TniQwhtfQALJy2ZT2ZhSgSMQ+LbLHrrKJ+qFLJIsjkFMkJi12nd/?=
 =?us-ascii?Q?WjySk8l/HgbG034O0oAhX37dAVV5XogDETpvInNlz9us23sAUgDSMuSN2mYQ?=
 =?us-ascii?Q?JcI28slNXCKxRfyK7TGpUv4BEbRz9TWPN3yMc5lJdh0c3KZHzLA6/+e5k58l?=
 =?us-ascii?Q?US8iCKFgrALTqfXyOVPxjDeDBdg2AHlkd0B3xIud0Ibvb8nXJ2VOwtllNwMe?=
 =?us-ascii?Q?MRD17bmPWe0wyD12IG1ikb5EVDrtrzSlIEpJzjUwAZTCJ6ZoO0n5XCP0Zzrq?=
 =?us-ascii?Q?m3quKT0d1VQDHEpn1rmBMj4wGIKm7LYKS6lS/Np/AN2/DEjXdh42Ad9NTrhx?=
 =?us-ascii?Q?Z2e7u391bDhxXX3RtIpPIgtzu7kg3tlOS38Z4a/JzacWq92YR62wqCw+F26z?=
 =?us-ascii?Q?7bTKnE1bV7wtCP4ZHPbXurg=3D?=
X-OriginatorOrg: in-advantage.com
X-MS-Exchange-CrossTenant-Network-Message-Id: b4dd2333-fa3b-46e1-40e8-08da9f564e3a
X-MS-Exchange-CrossTenant-AuthSource: MWHPR1001MB2351.namprd10.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Sep 2022 00:30:25.6353
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 48e842ca-fbd8-4633-a79d-0c955a7d3aae
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: gOx792GIKyKyHs9MtnyFBkgwRZLwNbk2Uz4ivK12irKgk0mOK2SG8r/LYiqe9oEJcPdc5qbbdcEpR7wX551x6M3Y/klAnRIpZgQosCQyJXg=
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLAPR10MB4849
X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,
        DKIM_VALID,RCVD_IN_DNSWL_NONE,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS
        autolearn=ham autolearn_force=no version=3.4.6
X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on
        lindbergh.monkeyblade.net
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

The Ocelot switch core driver relies heavily on a fixed array of resources
for both ports and peripherals. This is in contrast to existing peripherals
- pinctrl for example - which have a one-to-one mapping of driver <>
resource. As such, these regmaps must be created differently so that
enumeration-based offsets are preserved.

Register the regmaps to the core MFD device unconditionally so they can be
referenced by the Ocelot switch / Felix DSA systems.

Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
---

v3
    * No change

v2
    * Alignment of variables broken out to a separate patch
    * Structs now correctly use EXPORT_SYMBOL*
    * Logic moved and comments added to clear up conditionals around
      vsc7512_target_io_res[i].start

v1 from previous RFC:
    * New patch

---
 drivers/mfd/ocelot-core.c  | 87 ++++++++++++++++++++++++++++++++++++++
 include/linux/mfd/ocelot.h |  5 +++
 2 files changed, 92 insertions(+)

diff --git a/drivers/mfd/ocelot-core.c b/drivers/mfd/ocelot-core.c
index 013e83173062..702555fbdcc5 100644
--- a/drivers/mfd/ocelot-core.c
+++ b/drivers/mfd/ocelot-core.c
@@ -45,6 +45,45 @@
 #define VSC7512_SIO_CTRL_RES_START	0x710700f8
 #define VSC7512_SIO_CTRL_RES_SIZE	0x00000100
 
+#define VSC7512_HSIO_RES_START		0x710d0000
+#define VSC7512_HSIO_RES_SIZE		0x00000128
+
+#define VSC7512_ANA_RES_START		0x71880000
+#define VSC7512_ANA_RES_SIZE		0x00010000
+
+#define VSC7512_QS_RES_START		0x71080000
+#define VSC7512_QS_RES_SIZE		0x00000100
+
+#define VSC7512_QSYS_RES_START		0x71800000
+#define VSC7512_QSYS_RES_SIZE		0x00200000
+
+#define VSC7512_REW_RES_START		0x71030000
+#define VSC7512_REW_RES_SIZE		0x00010000
+
+#define VSC7512_SYS_RES_START		0x71010000
+#define VSC7512_SYS_RES_SIZE		0x00010000
+
+#define VSC7512_S0_RES_START		0x71040000
+#define VSC7512_S1_RES_START		0x71050000
+#define VSC7512_S2_RES_START		0x71060000
+#define VSC7512_S_RES_SIZE		0x00000400
+
+#define VSC7512_GCB_RES_START		0x71070000
+#define VSC7512_GCB_RES_SIZE		0x0000022c
+
+#define VSC7512_PORT_0_RES_START	0x711e0000
+#define VSC7512_PORT_1_RES_START	0x711f0000
+#define VSC7512_PORT_2_RES_START	0x71200000
+#define VSC7512_PORT_3_RES_START	0x71210000
+#define VSC7512_PORT_4_RES_START	0x71220000
+#define VSC7512_PORT_5_RES_START	0x71230000
+#define VSC7512_PORT_6_RES_START	0x71240000
+#define VSC7512_PORT_7_RES_START	0x71250000
+#define VSC7512_PORT_8_RES_START	0x71260000
+#define VSC7512_PORT_9_RES_START	0x71270000
+#define VSC7512_PORT_10_RES_START	0x71280000
+#define VSC7512_PORT_RES_SIZE		0x00010000
+
 #define VSC7512_GCB_RST_SLEEP_US	100
 #define VSC7512_GCB_RST_TIMEOUT_US	100000
 
@@ -96,6 +135,36 @@ static const struct resource vsc7512_sgpio_resources[] = {
 	DEFINE_RES_REG_NAMED(VSC7512_SIO_CTRL_RES_START, VSC7512_SIO_CTRL_RES_SIZE, "gcb_sio"),
 };
 
+const struct resource vsc7512_target_io_res[TARGET_MAX] = {
+	[ANA] = DEFINE_RES_REG_NAMED(VSC7512_ANA_RES_START, VSC7512_ANA_RES_SIZE, "ana"),
+	[QS] = DEFINE_RES_REG_NAMED(VSC7512_QS_RES_START, VSC7512_QS_RES_SIZE, "qs"),
+	[QSYS] = DEFINE_RES_REG_NAMED(VSC7512_QSYS_RES_START, VSC7512_QSYS_RES_SIZE, "qsys"),
+	[REW] = DEFINE_RES_REG_NAMED(VSC7512_REW_RES_START, VSC7512_REW_RES_SIZE, "rew"),
+	[SYS] = DEFINE_RES_REG_NAMED(VSC7512_SYS_RES_START, VSC7512_SYS_RES_SIZE, "sys"),
+	[S0] = DEFINE_RES_REG_NAMED(VSC7512_S0_RES_START, VSC7512_S_RES_SIZE, "s0"),
+	[S1] = DEFINE_RES_REG_NAMED(VSC7512_S1_RES_START, VSC7512_S_RES_SIZE, "s1"),
+	[S2] = DEFINE_RES_REG_NAMED(VSC7512_S2_RES_START, VSC7512_S_RES_SIZE, "s2"),
+	[GCB] = DEFINE_RES_REG_NAMED(VSC7512_GCB_RES_START, VSC7512_GCB_RES_SIZE, "devcpu_gcb"),
+	[HSIO] = DEFINE_RES_REG_NAMED(VSC7512_HSIO_RES_START, VSC7512_HSIO_RES_SIZE, "hsio"),
+};
+EXPORT_SYMBOL_NS(vsc7512_target_io_res, MFD_OCELOT);
+
+const struct resource vsc7512_port_io_res[] = {
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_0_RES_START, VSC7512_PORT_RES_SIZE, "port0"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_1_RES_START, VSC7512_PORT_RES_SIZE, "port1"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_2_RES_START, VSC7512_PORT_RES_SIZE, "port2"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_3_RES_START, VSC7512_PORT_RES_SIZE, "port3"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_4_RES_START, VSC7512_PORT_RES_SIZE, "port4"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_5_RES_START, VSC7512_PORT_RES_SIZE, "port5"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_6_RES_START, VSC7512_PORT_RES_SIZE, "port6"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_7_RES_START, VSC7512_PORT_RES_SIZE, "port7"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_8_RES_START, VSC7512_PORT_RES_SIZE, "port8"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_9_RES_START, VSC7512_PORT_RES_SIZE, "port9"),
+	DEFINE_RES_REG_NAMED(VSC7512_PORT_10_RES_START, VSC7512_PORT_RES_SIZE, "port10"),
+	{}
+};
+EXPORT_SYMBOL_NS(vsc7512_port_io_res, MFD_OCELOT);
+
 static const struct mfd_cell vsc7512_devs[] = {
 	{
 		.name = "ocelot-pinctrl",
@@ -144,6 +213,7 @@ static void ocelot_core_try_add_regmaps(struct device *dev,
 
 int ocelot_core_init(struct device *dev)
 {
+	const struct resource *port_res;
 	int i, ndevs;
 
 	ndevs = ARRAY_SIZE(vsc7512_devs);
@@ -151,6 +221,23 @@ int ocelot_core_init(struct device *dev)
 	for (i = 0; i < ndevs; i++)
 		ocelot_core_try_add_regmaps(dev, &vsc7512_devs[i]);
 
+	/*
+	 * Both the target_io_res and the port_io_res structs need to be referenced directly by
+	 * the ocelot_ext driver, so they can't be attached to the dev directly and referenced by
+	 * offset like the rest of the drivers. Instead, create these regmaps always and allow any
+	 * children look these up by name.
+	 */
+	for (i = 0; i < TARGET_MAX; i++)
+		/*
+		 * The target_io_res array is sparsely populated. Use .start as an indication that
+		 * the entry isn't defined
+		 */
+		if (vsc7512_target_io_res[i].start)
+			ocelot_core_try_add_regmap(dev, &vsc7512_target_io_res[i]);
+
+	for (port_res = vsc7512_port_io_res; port_res->start; port_res++)
+		ocelot_core_try_add_regmap(dev, port_res);
+
 	return devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, vsc7512_devs, ndevs, NULL, 0, NULL);
 }
 EXPORT_SYMBOL_NS(ocelot_core_init, MFD_OCELOT);
diff --git a/include/linux/mfd/ocelot.h b/include/linux/mfd/ocelot.h
index dd72073d2d4f..439ff5256cf0 100644
--- a/include/linux/mfd/ocelot.h
+++ b/include/linux/mfd/ocelot.h
@@ -11,8 +11,13 @@
 #include <linux/regmap.h>
 #include <linux/types.h>
 
+#include <soc/mscc/ocelot.h>
+
 struct resource;
 
+extern const struct resource vsc7512_target_io_res[TARGET_MAX];
+extern const struct resource vsc7512_port_io_res[];
+
 static inline struct regmap *
 ocelot_regmap_from_resource_optional(struct platform_device *pdev,
 				     unsigned int index,
-- 
2.25.1