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Date:   Mon, 26 Sep 2022 19:57:34 +0530
From:   Manivannan Sadhasivam <mani@kernel.org>
To:     Asutosh Das <quic_asutoshd@quicinc.com>
Cc:     quic_nguyenb@quicinc.com, quic_xiaosenh@quicinc.com,
        quic_cang@quicinc.com, quic_nitirawa@quicinc.com,
        quic_rampraka@quicinc.com, quic_richardp@quicinc.com,
        stanley.chu@mediatek.com, adrian.hunter@intel.com,
        bvanassche@acm.org, avri.altman@wdc.com, beanhuo@micron.com,
        martin.petersen@oracle.com, linux-scsi@vger.kernel.org,
        Alim Akhtar <alim.akhtar@samsung.com>,
        "James E.J. Bottomley" <jejb@linux.ibm.com>,
        Matthias Brugger <matthias.bgg@gmail.com>,
        open list <linux-kernel@vger.kernel.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-arm-kernel@lists.infradead.org>,
        "moderated list:ARM/Mediatek SoC support" 
        <linux-mediatek@lists.infradead.org>
Subject: Re: [PATCH v1 02/16] ufs: core: Introduce Multi-circular queue
 capability
Message-ID: <20220926142734.GD101994@thinkpad>
References: <cover.1663894792.git.quic_asutoshd@quicinc.com>
 <fa3d70c1642c64ce75461f630eabe84b3b974d4e.1663894792.git.quic_asutoshd@quicinc.com>
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On Thu, Sep 22, 2022 at 06:05:09PM -0700, Asutosh Das wrote:
> Adds support to check for MCQ capability in the UFSHC.
> This capability can be used by host drivers to control
> MCQ enablement.
> 
> Co-developed-by: Can Guo <quic_cang@quicinc.com>
> Signed-off-by: Can Guo <quic_cang@quicinc.com>
> Signed-off-by: Asutosh Das <quic_asutoshd@quicinc.com>
> ---
>  drivers/ufs/core/ufshcd.c |  5 +++++
>  include/ufs/ufshcd.h      | 13 +++++++++++++
>  2 files changed, 18 insertions(+)
> 
> diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c
> index 4b9ae83..24661fc 100644
> --- a/drivers/ufs/core/ufshcd.c
> +++ b/drivers/ufs/core/ufshcd.c
> @@ -89,6 +89,7 @@
>  #define FDEVICEINIT_COMPL_TIMEOUT 1500 /* millisecs */
>  
>  #define EXT_IID_CAP_SHIFT 10
> +#define MCQ_SUPP_SHIFT 30
>  #define ufshcd_toggle_vreg(_dev, _vreg, _on)				\
>  	({                                                              \
>  		int _ret;                                               \
> @@ -2240,6 +2241,10 @@ static inline int ufshcd_hba_capabilities(struct ufs_hba *hba)
>  	if (err)
>  		dev_err(hba->dev, "crypto setup failed\n");
>  
> +	hba->mcq_sup = (hba->capabilities & MASK_MCQ_SUPPORT) >> MCQ_SUPP_SHIFT;

Again, if you use FIELD_* macro, addtional *_SHIFT macro is not needed.

> +	if (!hba->mcq_sup)
> +		return err;

Since this is not an error case, you can return 0 explicitly.

> +
>  	hba->mcq_capabilities = ufshcd_readl(hba, REG_MCQCAP);
>  	hba->ext_iid_sup = (hba->mcq_capabilities & MASK_EXT_IID_SUPPORT) >>
>  		EXT_IID_CAP_SHIFT;
> diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h
> index da1eb8a..da7ec0c 100644
> --- a/include/ufs/ufshcd.h
> +++ b/include/ufs/ufshcd.h
> @@ -660,6 +660,12 @@ enum ufshcd_caps {
>  	 * notification if it is supported by the UFS device.
>  	 */
>  	UFSHCD_CAP_TEMP_NOTIF				= 1 << 11,
> +
> +	/*
> +	 * This capability allows the host controller driver to turn on/off
> +	 * MCQ mode. MCQ mode may be used to increase performance.
> +	 */
> +	UFSHCD_CAP_MCQ_EN				= 1 << 12,
>  };
>  
>  struct ufs_hba_variant_params {
> @@ -820,6 +826,7 @@ struct ufs_hba_monitor {
>   * @complete_put: whether or not to call ufshcd_rpm_put() from inside
>   *	ufshcd_resume_complete()
>   * @ext_iid_sup: is EXT_IID is supported by UFSHC
> + * @mcq_sup: is mcq supported by UFSHC
>   */
>  struct ufs_hba {
>  	void __iomem *mmio_base;
> @@ -969,8 +976,14 @@ struct ufs_hba {
>  	u32 luns_avail;
>  	bool complete_put;
>  	bool ext_iid_sup;
> +	bool mcq_sup;
>  };
>  
> +static inline bool is_mcq_supported(struct ufs_hba *hba)

No inline please. Compiler is the best judge.

Thanks,
Mani

> +{
> +	return hba->mcq_sup && (hba->caps & UFSHCD_CAP_MCQ_EN);
> +}
> +
>  /* Returns true if clocks can be gated. Otherwise false */
>  static inline bool ufshcd_is_clkgating_allowed(struct ufs_hba *hba)
>  {
> -- 
> 2.7.4
> 

-- 
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