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Bottomley" , Matthias Brugger , Krzysztof Kozlowski , open list , "moderated list:ARM/Mediatek SoC support" , "moderated list:ARM/Mediatek SoC support" Subject: Re: [PATCH v1 04/16] ufs: core: mcq: Introduce Multi Circular Queue Message-ID: <20220926213251.GC15228@asutoshd-linux1.qualcomm.com> References: <20220926144957.GE101994@thinkpad> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; format=flowed Content-Disposition: inline In-Reply-To: <20220926144957.GE101994@thinkpad> User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: BunqsqPa_-iwxa5fehyGnNmqhAYykcSY X-Proofpoint-GUID: BunqsqPa_-iwxa5fehyGnNmqhAYykcSY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-09-26_09,2022-09-22_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 spamscore=0 malwarescore=0 adultscore=0 bulkscore=0 mlxscore=0 impostorscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 mlxlogscore=999 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2209260132 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 26 2022 at 07:50 -0700, Manivannan Sadhasivam wrote: >On Thu, Sep 22, 2022 at 06:05:11PM -0700, Asutosh Das wrote: [...] >> diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c >> new file mode 100644 >> index 0000000..934556f >> --- /dev/null >> +++ b/drivers/ufs/core/ufs-mcq.c [...] >> +static int ufshcd_mcq_config_nr_queues(struct ufs_hba *hba) >> +{ >> + int i, rem; >> + u32 hbaq_cap, cmp, tot_queues; >> + struct Scsi_Host *host = hba->host; >> + >> + hbaq_cap = hba->mcq_capabilities & 0xff; > >Define 0xff > >hbaq_cap should be named after the define used for 0xff. It is not quite >understandable now. > Ok. I think you want the name hbaq_cap to be changed to what 0xff signifies. Is that understanding correct? >> + >> + if (!rw_queues) >> + rw_queues = num_possible_cpus(); >> + >> + tot_queues = dev_cmd_queue + read_queues + poll_queues + rw_queues; >> + if (hbaq_cap < tot_queues) { >> + dev_err(hba->dev, "Total queues (%d) exceeds HC capacity (%d)\n", >> + tot_queues, hbaq_cap); >> + return -EOPNOTSUPP; >> + } >> + >> + rem = hbaq_cap - dev_cmd_queue; >> + cmp = rem; >> + hba->nr_queues[HCTX_TYPE_DEFAULT] = min3(cmp, rw_queues, >> + num_possible_cpus()); >> + rem -= hba->nr_queues[HCTX_TYPE_DEFAULT]; >> + cmp = rem; >> + hba->nr_queues[HCTX_TYPE_POLL] = min(cmp, poll_queues); > >Hmm, so the driver is not using the number of queues set by the user? >If the number varies, I don't think it should be configurable. > I think the driver would use the number of queues set by the user. Because there's a check(hbaq_cap < tot_queues) above that ensures that the HBA has enough queues for the given configuration. -asd >