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From:   Jiasheng Jiang <jiasheng@iscas.ac.cn>
To:     harry.wentland@amd.com, sunpeng.li@amd.com,
        Rodrigo.Siqueira@amd.com, alexander.deucher@amd.com,
        christian.koenig@amd.com, Xinhui.Pan@amd.com, airlied@gmail.com,
        daniel@ffwll.ch, aurabindo.pillai@amd.com, Jerry.Zuo@amd.com,
        Alvin.Lee2@amd.com, dillon.varone@amd.com, Martin.Leung@amd.com
Cc:     amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
        linux-kernel@vger.kernel.org, Jiasheng Jiang <jiasheng@iscas.ac.cn>
Subject: [PATCH] drm/amd/display: Add check for memory allocation
Date:   Tue, 27 Sep 2022 10:16:12 +0800
Message-Id: <20220927021612.31815-1-jiasheng@iscas.ac.cn>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

As kzalloc and dm_helpers_allocate_gpu_mem can return NULL pointer,
it should be better to check the return value and return error.
Moreover, the return value of dcn32_clk_mgr_construct should be checked
by cascade.

Fixes: 265280b99822 ("drm/amd/display: add CLKMGR changes for DCN32/321")
Signed-off-by: Jiasheng Jiang <jiasheng@iscas.ac.cn>
---
 .../drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c   | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
index c6785969eb1a..3dc04d780fbf 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c
@@ -718,7 +718,7 @@ static struct clk_mgr_funcs dcn32_funcs = {
 		.is_smu_present = dcn32_is_smu_present,
 };
 
-void dcn32_clk_mgr_construct(
+int dcn32_clk_mgr_construct(
 		struct dc_context *ctx,
 		struct clk_mgr_internal *clk_mgr,
 		struct pp_smu_funcs *pp_smu,
@@ -779,11 +779,19 @@ void dcn32_clk_mgr_construct(
 	clk_mgr->smu_present = false;
 
 	clk_mgr->base.bw_params = kzalloc(sizeof(*clk_mgr->base.bw_params), GFP_KERNEL);
+	if (!clk_mgr->base.bw_params)
+		return -ENOMEM;
 
 	/* need physical address of table to give to PMFW */
 	clk_mgr->wm_range_table = dm_helpers_allocate_gpu_mem(clk_mgr->base.ctx,
 			DC_MEM_ALLOC_TYPE_GART, sizeof(WatermarksExternal_t),
 			&clk_mgr->wm_range_table_addr);
+	if (!clk_mgr->wm_range_table) {
+		kfree(clk_mgr->base.bw_params);
+		return -ENOMEM;
+	}
+
+	return 0;
 }
 
 void dcn32_clk_mgr_destroy(struct clk_mgr_internal *clk_mgr)
-- 
2.25.1