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[2620:137:e000::1:20]) by mx.google.com with ESMTP id o12-20020a170906974c00b00782f6b6f10asi1031179ejy.726.2022.09.27.05.51.04; Tue, 27 Sep 2022 05:51:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231907AbiI0MiH (ORCPT + 99 others); Tue, 27 Sep 2022 08:38:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230081AbiI0MiE (ORCPT ); Tue, 27 Sep 2022 08:38:04 -0400 Received: from relay05.th.seeweb.it (relay05.th.seeweb.it [IPv6:2001:4b7a:2000:18::166]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13DF214F282; Tue, 27 Sep 2022 05:38:02 -0700 (PDT) Received: from [192.168.1.101] (95.49.29.188.neoplus.adsl.tpnet.pl [95.49.29.188]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id 1288F3F358; Tue, 27 Sep 2022 14:38:01 +0200 (CEST) Message-ID: Date: Tue, 27 Sep 2022 14:38:00 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 Subject: Re: [PATCH 06/15] arm64: dts: qcom: sc7280-idp-ec-h1: add missing QUP GPIO functions Content-Language: en-US To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20220925110608.145728-1-krzysztof.kozlowski@linaro.org> <20220925110608.145728-7-krzysztof.kozlowski@linaro.org> From: Konrad Dybcio In-Reply-To: <20220925110608.145728-7-krzysztof.kozlowski@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,NICE_REPLY_A, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 25.09.2022 13:05, Krzysztof Kozlowski wrote: > Add default GPIO function to SPI10 and SPI14 chip-select pins on SC7280 > IDP, as required by bindings. > > Signed-off-by: Krzysztof Kozlowski > --- Reviewed-by: Konrad Dybcio Konrad > arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi > index b35f3738933c..3cfeb118d379 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280-idp-ec-h1.dtsi > @@ -95,11 +95,13 @@ h1_ap_int_odl: h1-ap-int-odl-state { > > qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-state { > pins = "gpio43"; > + function = "gpio"; > output-high; > }; > > qup_spi14_cs_gpio_init_high: qup-spi14-cs-gpio-init-high-state { > pins = "gpio59"; > + function = "gpio"; > output-high; > }; > };