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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id z40-20020a2ebe28000000b0026c2fec2f8esm176975ljq.84.2022.09.27.07.31.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Sep 2022 07:31:39 -0700 (PDT) Message-ID: Date: Tue, 27 Sep 2022 16:31:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 Subject: Re: [PATCH v1 04/17] dt-bindings: display: mediatek: add MT8195 hdmi bindings Content-Language: en-US To: Guillaume Ranquet , Matthias Brugger , Vinod Koul , Stephen Boyd , David Airlie , Rob Herring , Philipp Zabel , Krzysztof Kozlowski , Daniel Vetter , Chunfeng Yun , CK Hu , Jitao shi , Chun-Kuang Hu , Michael Turquette , Kishon Vijay Abraham I Cc: linux-mediatek@lists.infradead.org, dri-devel@lists.freedesktop.org, Pablo Sun , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Mattijs Korpershoek , linux-arm-kernel@lists.infradead.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org References: <20220919-v1-0-4844816c9808@baylibre.com> <20220919-v1-4-4844816c9808@baylibre.com> <260bb17f-efc8-1287-3e03-f9b8e79a6e31@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.4 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 27/09/2022 15:54, Guillaume Ranquet wrote: > On Thu, 22 Sep 2022 09:18, Krzysztof Kozlowski > wrote: >> On 19/09/2022 18:56, Guillaume Ranquet wrote: >>> Add mt8195 SoC bindings for hdmi and hdmi-ddc >>> >>> Make port1 optional for mt8195 as it only supports HDMI tx for now. >>> Requires a ddc-i2c-bus phandle. >>> Requires a power-domains phandle. >>> >>> Signed-off-by: Guillaume Ranquet >>> >>> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml >>> index bdaf0b51e68c..abb231a0694b 100644 >>> --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml >>> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.yaml >>> @@ -21,6 +21,10 @@ properties: >>> - mediatek,mt7623-hdmi >>> - mediatek,mt8167-hdmi >>> - mediatek,mt8173-hdmi >>> + - mediatek,mt8195-hdmi >>> + >>> + clocks: true >>> + clock-names: true >> >> ???? >> Why is this moved? >> >>> >>> reg: >>> maxItems: 1 >>> @@ -28,20 +32,6 @@ properties: >>> interrupts: >>> maxItems: 1 >>> >>> - clocks: >>> - items: >>> - - description: Pixel Clock >>> - - description: HDMI PLL >>> - - description: Bit Clock >>> - - description: S/PDIF Clock >>> - >>> - clock-names: >>> - items: >>> - - const: pixel >>> - - const: pll >>> - - const: bclk >>> - - const: spdif >> >> Clock definition with constraints should stay here. You just customize >> it per variant. >> > Clocks are different between the two hardwares, so I've tried moving everything > inside the if/else block. > > Is there a better way to express this? https://elixir.bootlin.com/linux/v5.19-rc6/source/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml#L38 Best regards, Krzysztof