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Subject: [PATCH v5 1/2] x86/resctrl: Fix min_cbm_bits for AMD
From:   Babu Moger <babu.moger@amd.com>
To:     <corbet@lwn.net>, <reinette.chatre@intel.com>,
        <tglx@linutronix.de>, <mingo@redhat.com>, <bp@alien8.de>
CC:     <fenghua.yu@intel.com>, <dave.hansen@linux.intel.com>,
        <x86@kernel.org>, <hpa@zytor.com>, <paulmck@kernel.org>,
        <akpm@linux-foundation.org>, <quic_neeraju@quicinc.com>,
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        <chang.seok.bae@intel.com>, <pawan.kumar.gupta@linux.intel.com>,
        <jmattson@google.com>, <daniel.sneddon@linux.intel.com>,
        <sandipan.das@amd.com>, <tony.luck@intel.com>,
        <james.morse@arm.com>, <linux-doc@vger.kernel.org>,
        <linux-kernel@vger.kernel.org>, <bagasdotme@gmail.com>,
        <eranian@google.com>
Date:   Tue, 27 Sep 2022 15:16:29 -0500
Message-ID: <166430978944.372014.15309570958318893913.stgit@bmoger-ubuntu>
In-Reply-To: <166430959655.372014.14294247239089851375.stgit@bmoger-ubuntu>
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AMD systems support zero CBM (capacity bit mask) for cache allocation.=0A=
That is reflected in rdt_init_res_defs_amd() by:=0A=
=0A=
        r->cache.arch_has_empty_bitmaps =3D true;=0A=
=0A=
However given the unified code in cbm_validate(), checking for:=0A=
        val =3D=3D 0 && !arch_has_empty_bitmaps=0A=
=0A=
is not enough because of another check in cbm_validate():=0A=
=0A=
        if ((zero_bit - first_bit) < r->cache.min_cbm_bits)=0A=
=0A=
The default value of r->cache.min_cbm_bits =3D 1.=0A=
=0A=
Leading to:=0A=
=0A=
        $ cd /sys/fs/resctrl=0A=
        $ mkdir foo=0A=
        $ cd foo=0A=
        $ echo L3:0=3D0 > schemata=0A=
          -bash: echo: write error: Invalid argument=0A=
        $ cat /sys/fs/resctrl/info/last_cmd_status=0A=
          Need at least 1 bits in the mask=0A=
=0A=
Fix the issue by initializing the min_cbm_bits to 0 for AMD.=0A=
Also, remove the default setting of min_cbm_bits and initialize it=0A=
separately.=0A=
=0A=
After the fix=0A=
        $ cd /sys/fs/resctrl=0A=
        $ mkdir foo=0A=
        $ cd foo=0A=
        $ echo L3:0=3D0 > schemata=0A=
        $ cat /sys/fs/resctrl/info/last_cmd_status=0A=
          ok=0A=
=0A=
Link: https://lore.kernel.org/lkml/20220517001234.3137157-1-eranian@google.=
com/=0A=
Fixes: 316e7f901f5a ("x86/resctrl: Add struct rdt_cache::arch_has_{sparse, =
empty}_bitmaps")=0A=
Co-developed-by: Stephane Eranian <eranian@google.com>=0A=
Signed-off-by: Stephane Eranian <eranian@google.com>=0A=
Signed-off-by: Babu Moger <babu.moger@amd.com>=0A=
Reviewed-by: Ingo Molnar <mingo@kernel.org>=0A=
Reviewed-by: James Morse <james.morse@arm.com>=0A=
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>=0A=
---=0A=
 arch/x86/kernel/cpu/resctrl/core.c |    8 ++------=0A=
 1 file changed, 2 insertions(+), 6 deletions(-)=0A=
=0A=
diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct=
rl/core.c=0A=
index bb1c3f5f60c8..a5c51a14fbce 100644=0A=
--- a/arch/x86/kernel/cpu/resctrl/core.c=0A=
+++ b/arch/x86/kernel/cpu/resctrl/core.c=0A=
@@ -66,9 +66,6 @@ struct rdt_hw_resource rdt_resources_all[] =3D {=0A=
 			.rid			=3D RDT_RESOURCE_L3,=0A=
 			.name			=3D "L3",=0A=
 			.cache_level		=3D 3,=0A=
-			.cache =3D {=0A=
-				.min_cbm_bits	=3D 1,=0A=
-			},=0A=
 			.domains		=3D domain_init(RDT_RESOURCE_L3),=0A=
 			.parse_ctrlval		=3D parse_cbm,=0A=
 			.format_str		=3D "%d=3D%0*x",=0A=
@@ -83,9 +80,6 @@ struct rdt_hw_resource rdt_resources_all[] =3D {=0A=
 			.rid			=3D RDT_RESOURCE_L2,=0A=
 			.name			=3D "L2",=0A=
 			.cache_level		=3D 2,=0A=
-			.cache =3D {=0A=
-				.min_cbm_bits	=3D 1,=0A=
-			},=0A=
 			.domains		=3D domain_init(RDT_RESOURCE_L2),=0A=
 			.parse_ctrlval		=3D parse_cbm,=0A=
 			.format_str		=3D "%d=3D%0*x",=0A=
@@ -877,6 +871,7 @@ static __init void rdt_init_res_defs_intel(void)=0A=
 			r->cache.arch_has_sparse_bitmaps =3D false;=0A=
 			r->cache.arch_has_empty_bitmaps =3D false;=0A=
 			r->cache.arch_has_per_cpu_cfg =3D false;=0A=
+			r->cache.min_cbm_bits =3D 1;=0A=
 		} else if (r->rid =3D=3D RDT_RESOURCE_MBA) {=0A=
 			hw_res->msr_base =3D MSR_IA32_MBA_THRTL_BASE;=0A=
 			hw_res->msr_update =3D mba_wrmsr_intel;=0A=
@@ -897,6 +892,7 @@ static __init void rdt_init_res_defs_amd(void)=0A=
 			r->cache.arch_has_sparse_bitmaps =3D true;=0A=
 			r->cache.arch_has_empty_bitmaps =3D true;=0A=
 			r->cache.arch_has_per_cpu_cfg =3D true;=0A=
+			r->cache.min_cbm_bits =3D 0;=0A=
 		} else if (r->rid =3D=3D RDT_RESOURCE_MBA) {=0A=
 			hw_res->msr_base =3D MSR_IA32_MBA_BW_BASE;=0A=
 			hw_res->msr_update =3D mba_wrmsr_amd;=0A=
=0A=