Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp384072rwb; Wed, 28 Sep 2022 04:11:07 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7gR68Ftf1C50HRy9QPbfKlgLRCpiLLz3o3xEFUlS23uEdmk4rBlj1yzgUY71NF8haJwArU X-Received: by 2002:a17:903:244b:b0:178:1c88:4a4c with SMTP id l11-20020a170903244b00b001781c884a4cmr32141629pls.95.1664363467135; Wed, 28 Sep 2022 04:11:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664363467; cv=none; d=google.com; s=arc-20160816; b=u1FAsP6GIyAyxp8+Sqr0fEov4r/d8uCkOGTbSM6Wu5uEGorBOLT8BF8ncPH9i1vJik YYXvhzrUcAFzn3dVUGOZlYOe99Zn828uuJ8aFgvc/6qIru9cz4NcZSagNsK0uBVZiuVj 6Q0HGbrh8kFrcNASGCG2npdUIixZFntQMeHKCZpRt0auT5eWmnjo//XB4Ai24RweH0uB 5G2Qcq9NI/RhvTqyMCG8jEx3WwF358j9sqAu9K7dj167sz08v6yg5SN5+nASC/huEBie 4D5CiZvV8GyWP5LSL3wITwqlEOIUyp7m3F025ThdF5Ngx44PnChEvIIJw9SBwAbWbmzg 2aFg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :references:cc:to:subject:user-agent:mime-version:date:message-id; bh=2zZ1tti9M+iklUmyKaziT3kzT9pp6ZquYAPVLyq6zLI=; b=XJZmXZnOlIDTCYbM6f+YUauU0h1aP+tpw4FTbdeHIGH4WOuGaP4SQ5OqWHwc9aswVP m4sRvQ+IaJ17k8lZ9vXqMmV3CZ5a0FFOi/AbMOBEOrV8i8MTHkyW8+HDbvs/BL0wT5WH CboJl/yR6YUJS7Aq9AuHrQJNUOpQbo2/Zwi/Wod3Ttx+tb4oi/RvWTUgpEIIsAHA5k05 ULVhpXvcTNi4Epg+r4halzEYgw4AFCLtdTGCLitiDS+spEmg0uCJyFN0XmF/kaK4dZqv x1jk3L/wQr60BtjoVensTZmlSIMLZGUtqlonvmt841zmvI+HSOvRK53DcSZpFlOa0sKd 61bw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id d2-20020a170902654200b00178b6dfc03fsi4757333pln.40.2022.09.28.04.10.55; Wed, 28 Sep 2022 04:11:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233735AbiI1KrS (ORCPT + 99 others); Wed, 28 Sep 2022 06:47:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52806 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233100AbiI1KrQ (ORCPT ); Wed, 28 Sep 2022 06:47:16 -0400 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 5B9D0ACA0F; Wed, 28 Sep 2022 03:47:15 -0700 (PDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C7E631595; Wed, 28 Sep 2022 03:47:21 -0700 (PDT) Received: from [10.57.66.102] (unknown [10.57.66.102]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B49C93F792; Wed, 28 Sep 2022 03:47:12 -0700 (PDT) Message-ID: <739570af-b90a-aea6-ee56-cb1d5da48c97@arm.com> Date: Wed, 28 Sep 2022 11:47:11 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:91.0) Gecko/20100101 Thunderbird/91.13.1 Subject: Re: [PATCH v4 2/2] perf: arm_cspmu: Add support for NVIDIA SCF and MCF attribute To: Besar Wicaksono , "robin.murphy@arm.com" , "catalin.marinas@arm.com" , "will@kernel.org" , "mark.rutland@arm.com" Cc: "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-tegra@vger.kernel.org" , "sudeep.holla@arm.com" , "thanu.rangarajan@arm.com" , "Michael.Williams@arm.com" , Thierry Reding , Jonathan Hunter , Vikram Sethi , "mathieu.poirier@linaro.org" , "mike.leach@linaro.org" , "leo.yan@linaro.org" References: <20220814182351.8861-1-bwicaksono@nvidia.com> <20220814182351.8861-3-bwicaksono@nvidia.com> <7082762d-2d4d-aa7b-656c-75593b0697f0@arm.com> From: Suzuki K Poulose In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-6.5 required=5.0 tests=BAYES_00,NICE_REPLY_A, RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 28/09/2022 02:38, Besar Wicaksono wrote: > > >> -----Original Message----- >> From: Suzuki K Poulose >> Sent: Tuesday, September 27, 2022 6:43 AM >> To: Besar Wicaksono ; robin.murphy@arm.com; >> catalin.marinas@arm.com; will@kernel.org; mark.rutland@arm.com >> Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org; >> linux-tegra@vger.kernel.org; sudeep.holla@arm.com; >> thanu.rangarajan@arm.com; Michael.Williams@arm.com; Thierry Reding >> ; Jonathan Hunter ; Vikram >> Sethi ; mathieu.poirier@linaro.org; >> mike.leach@linaro.org; leo.yan@linaro.org >> Subject: Re: [PATCH v4 2/2] perf: arm_cspmu: Add support for NVIDIA SCF >> and MCF attribute >> >> External email: Use caution opening links or attachments >> >> >> On 14/08/2022 19:23, Besar Wicaksono wrote: >>> Add support for NVIDIA System Cache Fabric (SCF) and Memory Control >>> Fabric (MCF) PMU attributes for CoreSight PMU implementation in >>> NVIDIA devices. >>> >>> Signed-off-by: Besar Wicaksono >>> +struct nv_cspmu_match { >>> + u32 prodid; >>> + u32 prodid_mask; >>> + u64 filter_mask; >>> + const char *name_pattern; >>> + enum nv_cspmu_name_fmt name_fmt; >>> + struct attribute **event_attr; >>> + struct attribute **format_attr; >>> +}; >>> + >>> +static const struct nv_cspmu_match nv_cspmu_match[] = { >> >> Similar coding style nit below. >> > > Sure, I will update this. > >> >> Otherwise, >> >> Acked-by: Suzuki K Poulose > > Thanks! > > Unfortunately, we need to update the name of the PMUs and remove > some of the attributes in NVIDIA implementation. This requires a change > in nvidia_cspmu.c and nvidia-pmu.rst. I hope you are fine if I include this > change on v5 patch. That should be fine. Suzuki