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Wed, 28 Sep 2022 18:58:32 -0500 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB06.amd.com (10.181.40.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Wed, 28 Sep 2022 18:58:32 -0500 Received: from xsjlizhih40.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2375.28 via Frontend Transport; Wed, 28 Sep 2022 18:58:31 -0500 From: Lizhi Hou To: , , , CC: Lizhi Hou , , , , , Subject: [PATCH V5 XDMA 2/2] dmaengine: xilinx: xdma: Add user logic interrupt support Date: Wed, 28 Sep 2022 16:58:27 -0700 Message-ID: <1664409507-64079-3-git-send-email-lizhi.hou@amd.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1664409507-64079-1-git-send-email-lizhi.hou@amd.com> References: <1664409507-64079-1-git-send-email-lizhi.hou@amd.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT113:EE_|SA1PR12MB5637:EE_ X-MS-Office365-Filtering-Correlation-Id: acccfecb-04b4-4621-e367-08daa1ad59e9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Sep 2022 23:58:33.5636 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: acccfecb-04b4-4621-e367-08daa1ad59e9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT113.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB5637 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Xilinx DMA/Bridge Subsystem for PCIe (XDMA) provides up to 16 user interrupt wires to user logic that generate interrupts to the host. This patch adds APIs to enable/disable user logic interrupt for a given interrupt wire index. Signed-off-by: Lizhi Hou Signed-off-by: Sonal Santan Signed-off-by: Max Zhen Signed-off-by: Brian Xu --- MAINTAINERS | 1 + drivers/dma/xilinx/xdma.c | 65 ++++++++++++++++++++++++++++++++++++ include/linux/dma/amd_xdma.h | 16 +++++++++ 3 files changed, 82 insertions(+) create mode 100644 include/linux/dma/amd_xdma.h diff --git a/MAINTAINERS b/MAINTAINERS index c1be0b2e378a..019d84b2b086 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -21691,6 +21691,7 @@ L: dmaengine@vger.kernel.org S: Supported F: drivers/dma/xilinx/xdma-regs.h F: drivers/dma/xilinx/xdma.c +F: include/linux/dma/amd_xdma.h F: include/linux/platform_data/amd_xdma.h XILINX ZYNQMP DPDMA DRIVER diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c index 58a57e03bef5..13f627445c4a 100644 --- a/drivers/dma/xilinx/xdma.c +++ b/drivers/dma/xilinx/xdma.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include #include @@ -736,6 +737,7 @@ static int xdma_set_vector_reg(struct xdma_device *xdev, u32 vec_tbl_start, static int xdma_irq_init(struct xdma_device *xdev) { u32 irq = xdev->irq_start; + u32 user_irq_start; int i, j, ret; /* return failure if there are not enough IRQs */ @@ -786,6 +788,18 @@ static int xdma_irq_init(struct xdma_device *xdev) goto failed; } + /* config user IRQ registers if needed */ + user_irq_start = xdev->h2c_chan_num + xdev->c2h_chan_num; + if (xdev->irq_num > user_irq_start) { + ret = xdma_set_vector_reg(xdev, XDMA_IRQ_USER_VEC_NUM, + user_irq_start, + xdev->irq_num - user_irq_start); + if (ret) { + xdma_err(xdev, "failed to set user vectors: %d", ret); + goto failed; + } + } + /* enable interrupt */ ret = xdma_enable_intr(xdev); if (ret) { @@ -816,6 +830,57 @@ static bool xdma_filter_fn(struct dma_chan *chan, void *param) return true; } +/** + * xdma_disable_user_irq - Disable user interrupt + * @pdev: Pointer to the platform_device structure + * @user_irq_index: User IRQ index + */ +void xdma_disable_user_irq(struct platform_device *pdev, u32 user_irq_index) +{ + struct xdma_device *xdev = platform_get_drvdata(pdev); + + if (xdev->h2c_chan_num + xdev->c2h_chan_num + user_irq_index >= + xdev->irq_num) { + xdma_err(xdev, "invalid user irq index"); + return; + } + + xdma_write_reg(xdev, XDMA_IRQ_BASE, XDMA_IRQ_USER_INT_EN_W1C, + (1 << user_irq_index)); +} +EXPORT_SYMBOL(xdma_disable_user_irq); + +/** + * xdma_enable_user_irq - Enable user logic interrupt + * @pdev: Pointer to the platform_device structure + * @user_irq_index: User logic IRQ wire index + * @irq: Pointer to returning system IRQ number + */ +int xdma_enable_user_irq(struct platform_device *pdev, u32 user_irq_index, + u32 *irq) +{ + struct xdma_device *xdev = platform_get_drvdata(pdev); + u32 user_irq; + int ret; + + user_irq = xdev->h2c_chan_num + xdev->c2h_chan_num + user_irq_index; + if (user_irq >= xdev->irq_num) { + xdma_err(xdev, "invalid user irq index"); + return -EINVAL; + } + + ret = xdma_write_reg(xdev, XDMA_IRQ_BASE, XDMA_IRQ_USER_INT_EN_W1S, + (1 << user_irq_index)); + if (ret) { + xdma_err(xdev, "set user irq mask failed, %d", ret); + return ret; + } + *irq = user_irq + xdev->irq_start; + + return 0; +} +EXPORT_SYMBOL(xdma_enable_user_irq); + /** * xdma_remove - Driver remove function * @pdev: Pointer to the platform_device structure diff --git a/include/linux/dma/amd_xdma.h b/include/linux/dma/amd_xdma.h new file mode 100644 index 000000000000..91fb02ff93a7 --- /dev/null +++ b/include/linux/dma/amd_xdma.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) 2022, Advanced Micro Devices, Inc. + */ + +#ifndef _DMAENGINE_AMD_XDMA_H +#define _DMAENGINE_AMD_XDMA_H + +#include +#include + +int xdma_enable_user_irq(struct platform_device *pdev, u32 user_irq_index, + u32 *irq); +void xdma_disable_user_irq(struct platform_device *pdev, u32 user_irq_index); + +#endif /* _DMAENGINE_AMD_XDMA_H */ -- 2.27.0