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From:   Hal Feng <hal.feng@linux.starfivetech.com>
To:     linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
        linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org
Cc:     Rob Herring <robh+dt@kernel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>,
        Daniel Lezcano <daniel.lezcano@linaro.org>,
        Thomas Gleixner <tglx@linutronix.de>,
        Marc Zyngier <maz@kernel.org>,
        Philipp Zabel <p.zabel@pengutronix.de>,
        Stephen Boyd <sboyd@kernel.org>,
        Michael Turquette <mturquette@baylibre.com>,
        Linus Walleij <linus.walleij@linaro.org>,
        Emil Renner Berthing <kernel@esmil.dk>,
        Hal Feng <hal.feng@linux.starfivetech.com>,
        linux-kernel@vger.kernel.org
Subject: [PATCH v1 13/30] reset: starfive: Add StarFive JH7110 SoC support
Date:   Fri, 30 Sep 2022 01:53:52 +0800
Message-Id: <20220929175352.19821-1-hal.feng@linux.starfivetech.com>
In-Reply-To: <20220929143225.17907-1-hal.feng@linux.starfivetech.com>
References: <20220929143225.17907-1-hal.feng@linux.starfivetech.com>
Feedback-ID: bizesmtp:linux.starfivetech.com:qybglogicsvr:qybglogicsvr2
Precedence: bulk

Make the driver be compatible with StarFive JH7110 SoC.
Note that the register base address of clock controller is the
same with the reset controller one. So we store the property
'reg' in the parent node of node 'reset-controller' and use
syscon APIs to get regmap structure.

Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com>
---
 drivers/reset/reset-starfive.c | 35 +++++++++++++++++++++++++++-------
 1 file changed, 28 insertions(+), 7 deletions(-)

diff --git a/drivers/reset/reset-starfive.c b/drivers/reset/reset-starfive.c
index 56d07bafadd7..a953fed711fd 100644
--- a/drivers/reset/reset-starfive.c
+++ b/drivers/reset/reset-starfive.c
@@ -8,7 +8,7 @@
 
 #include <linux/mfd/syscon.h>
 #include <linux/of.h>
-#include <linux/platform_device.h>
+#include <linux/of_device.h>
 #include <linux/regmap.h>
 #include <linux/reset-controller.h>
 
@@ -134,7 +134,7 @@ static const struct reset_control_ops starfive_reset_ops = {
 	.status		= starfive_reset_status,
 };
 
-static int __init starfive_reset_probe(struct platform_device *pdev)
+static int reset_starfive_register(struct platform_device *pdev, const u32 *asserted)
 {
 	struct starfive_reset *data;
 	int ret;
@@ -145,9 +145,12 @@ static int __init starfive_reset_probe(struct platform_device *pdev)
 
 	data->regmap = device_node_to_regmap(pdev->dev.of_node);
 	if (IS_ERR(data->regmap)) {
-		dev_err(&pdev->dev, "failed to get regmap (error %ld)\n",
-			PTR_ERR(data->regmap));
-		return PTR_ERR(data->regmap);
+		data->regmap = syscon_node_to_regmap(pdev->dev.of_node->parent);
+		if (IS_ERR(data->regmap)) {
+			dev_err(&pdev->dev, "failed to get regmap (error %ld)\n",
+				PTR_ERR(data->regmap));
+			return PTR_ERR(data->regmap);
+		}
 	}
 
 	ret = of_property_read_u32(pdev->dev.of_node, "starfive,assert-offset",
@@ -177,16 +180,34 @@ static int __init starfive_reset_probe(struct platform_device *pdev)
 	data->rcdev.dev = &pdev->dev;
 	data->rcdev.of_node = pdev->dev.of_node;
 
-	data->asserted = jh7100_reset_asserted;
+	data->asserted = asserted;
 
 	return devm_reset_controller_register(&pdev->dev, &data->rcdev);
 }
 
 static const struct of_device_id starfive_reset_dt_ids[] = {
-	{ .compatible = "starfive,jh7100-reset" },
+	{
+		.compatible = "starfive,jh7100-reset",
+		.data = jh7100_reset_asserted,
+	},
+	{
+		.compatible = "starfive,jh7110-reset",
+		.data = NULL,
+	},
 	{ /* sentinel */ }
 };
 
+static int __init starfive_reset_probe(struct platform_device *pdev)
+{
+	const struct of_device_id *match;
+
+	match = of_match_device(starfive_reset_dt_ids, &pdev->dev);
+	if (!match)
+		return -EINVAL;
+
+	return reset_starfive_register(pdev, (u32 *)(match->data));
+}
+
 static struct platform_driver starfive_reset_driver = {
 	.driver = {
 		.name = "starfive-reset",
-- 
2.17.1