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References: <20220928095805.596-1-ravi.bangoria@amd.com> <20220928095805.596-7-ravi.bangoria@amd.com>
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From:   Namhyung Kim <namhyung@kernel.org>
Date:   Thu, 29 Sep 2022 21:59:40 -0700
Message-ID: <CAM9d7cgDTZRR+eciX-4N0VZ5uoEYqikUOyiEE_hu3JTEBsONOQ@mail.gmail.com>
Subject: Re: [PATCH v3 06/15] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR
To:     Ravi Bangoria <ravi.bangoria@amd.com>
Cc:     Peter Zijlstra <peterz@infradead.org>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Jiri Olsa <jolsa@kernel.org>,
        Stephane Eranian <eranian@google.com>,
        Ian Rogers <irogers@google.com>, Joe Mario <jmario@redhat.com>,
        Leo Yan <leo.yan@linaro.org>, alisaidi@amazon.com,
        Andi Kleen <ak@linux.intel.com>,
        Kan Liang <kan.liang@linux.intel.com>,
        dave.hansen@linux.intel.com, "H. Peter Anvin" <hpa@zytor.com>,
        Ingo Molnar <mingo@redhat.com>,
        Mark Rutland <mark.rutland@arm.com>,
        Alexander Shishkin <alexander.shishkin@linux.intel.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Borislav Petkov <bp@alien8.de>, x86@kernel.org,
        linux-perf-users <linux-perf-users@vger.kernel.org>,
        linux-kernel <linux-kernel@vger.kernel.org>,
        Sandipan Das <sandipan.das@amd.com>, ananth.narayan@amd.com,
        Kim Phillips <kim.phillips@amd.com>, santosh.shukla@amd.com
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On Wed, Sep 28, 2022 at 3:00 AM Ravi Bangoria <ravi.bangoria@amd.com> wrote:
>
> IBS_DC_PHYSADDR provides the physical data address for the tagged load/
> store operation. Populate perf sample physical address using it.
>
> Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
> ---
>  arch/x86/events/amd/ibs.c | 8 +++++++-
>  kernel/events/core.c      | 3 ++-
>  2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
> index 0ad49105c154..3271735f0070 100644
> --- a/arch/x86/events/amd/ibs.c
> +++ b/arch/x86/events/amd/ibs.c
> @@ -989,6 +989,11 @@ static void perf_ibs_parse_ld_st_data(__u64 sample_type,
>                 data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
>                 data->sample_flags |= PERF_SAMPLE_ADDR;
>         }
> +
> +       if (sample_type & PERF_SAMPLE_PHYS_ADDR && op_data3.dc_phy_addr_valid) {
> +               data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
> +               data->sample_flags |= PERF_SAMPLE_PHYS_ADDR;
> +       }
>  }
>
>  static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
> @@ -998,7 +1003,8 @@ static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
>             (perf_ibs == &perf_ibs_op &&
>              (sample_type & PERF_SAMPLE_DATA_SRC ||
>               sample_type & PERF_SAMPLE_WEIGHT_TYPE ||
> -             sample_type & PERF_SAMPLE_ADDR)))
> +             sample_type & PERF_SAMPLE_ADDR ||
> +             sample_type & PERF_SAMPLE_PHYS_ADDR)))
>                 return perf_ibs->offset_max;
>         else if (check_rip)
>                 return 3;
> diff --git a/kernel/events/core.c b/kernel/events/core.c
> index e1ffdb861b53..49bc3b5e6c8a 100644
> --- a/kernel/events/core.c
> +++ b/kernel/events/core.c
> @@ -7435,7 +7435,8 @@ void perf_prepare_sample(struct perf_event_header *header,
>                 header->size += size;
>         }
>
> -       if (sample_type & PERF_SAMPLE_PHYS_ADDR)
> +       if (sample_type & PERF_SAMPLE_PHYS_ADDR &&
> +           filtered_sample_type & PERF_SAMPLE_PHYS_ADDR)

It'd be enough to check the filtered_sample_type only.

Thanks,
Namhyung


>                 data->phys_addr = perf_virt_to_phys(data->addr);
>
>  #ifdef CONFIG_CGROUP_PERF
> --
> 2.31.1
>