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[2620:137:e000::1:20]) by mx.google.com with ESMTP id u10-20020a170906780a00b007817a869a3bsi1350744ejm.179.2022.09.30.04.09.41; Fri, 30 Sep 2022 04:10:07 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=ayzsgt22; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232338AbiI3KXX (ORCPT + 99 others); Fri, 30 Sep 2022 06:23:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231585AbiI3KTJ (ORCPT ); Fri, 30 Sep 2022 06:19:09 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 916D3184834; Fri, 30 Sep 2022 03:19:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1664533146; x=1696069146; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=h/G+GFjQMCRf72t3x8igo9ICZroVhNmHFQSX5Tjz1D8=; b=ayzsgt22tEHNk45D8Qsa2ALS7CViv37kb0az+yLshwO4k6b7D0NwH3YA CW8LxkqVIcgESylh9nwcrDzd65sYVYQEAiGrGVRLlkJQupxBQTl0RD0oV 0pnTtrFvsGcrPdCdM47h8ieUqNo/mWFW7ASnT0j+t6Z2YA67UQupZFlCa URWq6bkQqiJhvgDc8TmG4wSKVbrJO8Nuuhfxw/gFbwkcmvKTuiVK9VauA M9o3KzYkDxI9FsEvTU0vx3XOjv3WHh5qHZrg5to3AsDXF9hKffAF+ofAw xlHx2j6B6AP1X7S7mO+EL4G8a7nwlhCDjp1HoLZlS/a8Y00pisqrAh8+Z w==; X-IronPort-AV: E=McAfee;i="6500,9779,10485"; a="366207526" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="366207526" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 03:19:04 -0700 X-IronPort-AV: E=McAfee;i="6500,9779,10485"; a="726807752" X-IronPort-AV: E=Sophos;i="5.93,358,1654585200"; d="scan'208";a="726807752" Received: from ls.sc.intel.com (HELO localhost) ([143.183.96.54]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Sep 2022 03:19:04 -0700 From: isaku.yamahata@intel.com To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org Cc: isaku.yamahata@intel.com, isaku.yamahata@gmail.com, Paolo Bonzini , erdemaktas@google.com, Sean Christopherson , Sagi Shahar Subject: [PATCH v9 076/105] KVM: x86: Assume timer IRQ was injected if APIC state is proteced Date: Fri, 30 Sep 2022 03:18:10 -0700 Message-Id: <5058ab82e415eda4307569cbf1f3705c2cae63d6.1664530908.git.isaku.yamahata@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Sean Christopherson If APIC state is protected, i.e. the vCPU is a TDX guest, assume a timer IRQ was injected when deciding whether or not to busy wait in the "timer advanced" path. The "real" vIRR is not readable/writable, so trying to query for a pending timer IRQ will return garbage. Note, TDX can scour the PIR if it wants to be more precise and skip the "wait" call entirely. Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 78452a26ad33..4e506084e8ed 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1606,8 +1606,17 @@ static void apic_update_lvtt(struct kvm_lapic *apic) static bool lapic_timer_int_injected(struct kvm_vcpu *vcpu) { struct kvm_lapic *apic = vcpu->arch.apic; - u32 reg = kvm_lapic_get_reg(apic, APIC_LVTT); + u32 reg; + /* + * Assume a timer IRQ was "injected" if the APIC is protected. KVM's + * copy of the vIRR is bogus, it's the responsibility of the caller to + * precisely check whether or not a timer IRQ is pending. + */ + if (apic->guest_apic_protected) + return true; + + reg = kvm_lapic_get_reg(apic, APIC_LVTT); if (kvm_apic_hw_enabled(apic)) { int vec = reg & APIC_VECTOR_MASK; void *bitmap = apic->regs + APIC_ISR; -- 2.25.1