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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dn11-20020a17090794cb00b00778d193ca81si3272036ejc.550.2022.09.30.20.08.12; Fri, 30 Sep 2022 20:08:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=mgeqXQDV; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232473AbiJADFe (ORCPT + 99 others); Fri, 30 Sep 2022 23:05:34 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44928 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231854AbiJADFO (ORCPT ); Fri, 30 Sep 2022 23:05:14 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D89441D06; Fri, 30 Sep 2022 20:04:54 -0700 (PDT) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2912uTIL002355; Sat, 1 Oct 2022 03:04:35 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=KlcFz2ME0Xi6BduntJ50BfO5vBpfh/8IzLZSNaaw0hw=; b=mgeqXQDVGGyht7xPsuqyYx1WvohqAMY+FwMUzLE4ntbHPvcq17pgkOR5mRvvGXJ6tAtI te+ng7I3gqAlZ2yccNEVAvdlgLwGefemPODNx/ZxIK2HapPEVvYEilxQmBWUe7JBjx4q vfujXrlezbXVKJpvPxyEUVj3pi7BNk+13F3f/9QI94GoZSAcpECp5VqtlSo7KVjq00BL UhHQCxi8WWESgEL/g/3mSEzjCUuaKeifCaUhchtfTesv0tRqlgchNLOvojdCD0kfVJWr HpP92rWpbDyT8kS3Yszf6OPIx+eiowZXouicbWAtMpUXu0cKS3pYFMeaEYzmqB9OI7pF TQ== Received: from nasanppmta03.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jxawu05bk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 01 Oct 2022 03:04:35 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 29134Xo0003169 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 1 Oct 2022 03:04:33 GMT Received: from hu-molvera-sd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 30 Sep 2022 20:04:33 -0700 From: Melody Olvera To: Andy Gross , Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , "Krzysztof Kozlowski" , Thomas Gleixner , Marc Zyngier CC: , , , , Melody Olvera Subject: [PATCH 4/5] clk: qcom: Add support for QDU1000 and QRU1000 RPMh clocks Date: Fri, 30 Sep 2022 20:04:02 -0700 Message-ID: <20221001030403.27659-5-quic_molvera@quicinc.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221001030403.27659-1-quic_molvera@quicinc.com> References: <20221001030403.27659-1-quic_molvera@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Spqw-iIqV5UsQl_7RuNUTuxqv8EztE6F X-Proofpoint-ORIG-GUID: Spqw-iIqV5UsQl_7RuNUTuxqv8EztE6F X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-01_02,2022-09-29_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=994 phishscore=0 clxscore=1015 malwarescore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 adultscore=0 impostorscore=0 priorityscore=1501 mlxscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210010015 X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE, SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add support for RMPh clocks for QDU1000 and QRU1000 SoCs. Signed-off-by: Melody Olvera --- drivers/clk/qcom/clk-rpmh.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c index c07cab6905cb..27d11ffac71e 100644 --- a/drivers/clk/qcom/clk-rpmh.c +++ b/drivers/clk/qcom/clk-rpmh.c @@ -628,6 +628,18 @@ static const struct clk_rpmh_desc clk_rpmh_sdx65 = { .num_clks = ARRAY_SIZE(sdx65_rpmh_clocks), }; +DEFINE_CLK_RPMH_ARC(qdru1000, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 1); + +static struct clk_hw *qdru1000_rpmh_clocks[] = { + [RPMH_CXO_CLK] = &qdru1000_bi_tcxo.hw, + [RPMH_CXO_CLK_A] = &qdru1000_bi_tcxo_ao.hw, +}; + +static const struct clk_rpmh_desc clk_rpmh_qdru1000 = { + .clks = qdru1000_rpmh_clocks, + .num_clks = ARRAY_SIZE(qdru1000_rpmh_clocks), +}; + static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec, void *data) { @@ -723,6 +735,8 @@ static const struct of_device_id clk_rpmh_match_table[] = { { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350}, { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, + { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdru1000}, + { .compatible = "qcom,qru1000-rpmh-clk", .data = &clk_rpmh_qdru1000}, { } }; MODULE_DEVICE_TABLE(of, clk_rpmh_match_table); -- 2.37.3