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[2620:137:e000::1:20]) by mx.google.com with ESMTP id nl17-20020a17090b385100b001f31c65900dsi12072241pjb.150.2022.09.30.23.43.14; Fri, 30 Sep 2022 23:43:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@microchip.com header.s=mchp header.b=D1kRS6p9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=microchip.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229611AbiJAGSA (ORCPT + 99 others); Sat, 1 Oct 2022 02:18:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50858 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229590AbiJAGRo (ORCPT ); Sat, 1 Oct 2022 02:17:44 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.153.233]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B41B6222B4; Fri, 30 Sep 2022 23:17:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1664605024; x=1696141024; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=fYomyvgXt3h7VxUAJyPGwwr/LfR00ZT+vHWgd1EPODc=; b=D1kRS6p9+4E/jn+XHZhfdHUm/wvH5qpnAZz2EKO8FCm60LuFrGm/rEjt 7WaXdHD7LDXcJaubCLJa/kbn7TZxNcxB5nOipcrv04KIs0LAGAtLBtzuC 4D/eXSGGhxBvW5ytSJdOU0ELro+gNEZM/8h9MuBVuUSk4KZ7Palm0o01R 27J5yaAFjUnI28wA2vlj2+VFgIoVAXiDX9WIGGRo75EpOapPVq8++tELA V4d5sfTJ9fK3OfsZEeppdmLmRJ6S1ntV8E/fYWNi0SCMDuINS9+dZRNxH 85Wtmp9nJsiuPH6elDgRl2oJqmlTzB3Upm+bX7SCJolDNNsSwuOeUzACE A==; X-IronPort-AV: E=Sophos;i="5.93,360,1654585200"; d="scan'208";a="182791017" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 Sep 2022 23:15:25 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.12; Fri, 30 Sep 2022 23:15:25 -0700 Received: from CHE-LT-UNGSOFTWARE.microchip.com (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2507.12 via Frontend Transport; Fri, 30 Sep 2022 23:15:19 -0700 From: Kumaravel Thiagarajan To: , , , , , , , , , , , , CC: , , Subject: [PATCH v2 tty-next 3/3] 8250: microchip: pci1xxxx: Add power management functions to quad-uart driver. Date: Sat, 1 Oct 2022 11:45:07 +0530 Message-ID: <20221001061507.3508603-4-kumaravel.thiagarajan@microchip.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221001061507.3508603-1-kumaravel.thiagarajan@microchip.com> References: <20221001061507.3508603-1-kumaravel.thiagarajan@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_MED, SPF_HELO_PASS,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org pci1xxxx's quad-uart function has the capability to wake up the host from suspend state. Enable wakeup before entering into suspend and disable wakeup on resume. Signed-off-by: Kumaravel Thiagarajan --- Changes in v2: - Use DEFINE_SIMPLE_DEV_PM_OPS instead of SIMPLE_DEV_PM_OPS. - Use pm_sleep_ptr instead of CONFIG_PM_SLEEP. - Change the return data type of pci1xxxx_port_suspend to bool from int. --- drivers/tty/serial/8250/8250_pci1xxxx.c | 112 ++++++++++++++++++++++++ 1 file changed, 112 insertions(+) diff --git a/drivers/tty/serial/8250/8250_pci1xxxx.c b/drivers/tty/serial/8250/8250_pci1xxxx.c index 999e5a284266..0a0459f66177 100644 --- a/drivers/tty/serial/8250/8250_pci1xxxx.c +++ b/drivers/tty/serial/8250/8250_pci1xxxx.c @@ -352,6 +352,112 @@ static void pci1xxxx_irq_assign(struct pci1xxxx_8250 *priv, } } +static bool pci1xxxx_port_suspend(int line) +{ + struct uart_8250_port *up = serial8250_get_port(line); + struct uart_port *port = &up->port; + unsigned long flags; + u8 wakeup_mask; + bool ret = false; + + if (port->suspended == 0 && port->dev) { + wakeup_mask = readb(up->port.membase + UART_WAKE_MASK_REG); + + spin_lock_irqsave(&port->lock, flags); + port->mctrl &= ~TIOCM_OUT2; + port->ops->set_mctrl(port, port->mctrl); + spin_unlock_irqrestore(&port->lock, flags); + + if ((wakeup_mask & UART_WAKE_SRCS) != UART_WAKE_SRCS) + ret = true; + } + + writeb(UART_WAKE_SRCS, port->membase + UART_WAKE_REG); + + return ret; +} + +static void pci1xxxx_port_resume(int line) +{ + struct uart_8250_port *up = serial8250_get_port(line); + struct uart_port *port = &up->port; + unsigned long flags; + + writeb(UART_WAKE_SRCS, port->membase + UART_WAKE_REG); + + if (port->suspended == 0) { + spin_lock_irqsave(&port->lock, flags); + port->mctrl |= TIOCM_OUT2; + port->ops->set_mctrl(port, port->mctrl); + spin_unlock_irqrestore(&port->lock, flags); + } +} + +static int pci1xxxx_suspend(struct device *dev) +{ + struct pci1xxxx_8250 *priv = dev_get_drvdata(dev); + struct pci_dev *pcidev = to_pci_dev(dev); + unsigned int data; + void __iomem *p; + bool wakeup = false; + int i; + + for (i = 0; i < priv->nr; i++) { + if (priv->line[i] >= 0) { + serial8250_suspend_port(priv->line[i]); + wakeup |= pci1xxxx_port_suspend(priv->line[i]); + } + } + + p = pci_ioremap_bar(pcidev, 0); + if (!p) { + dev_err(dev, "remapping of bar 0 memory failed"); + return -ENOMEM; + } + + data = readl(p + UART_RESET_REG); + writel(data | UART_RESET_D3_RESET_DISABLE, p + UART_RESET_REG); + + if (wakeup) + writeb(UART_PCI_CTRL_D3_CLK_ENABLE, (p + UART_PCI_CTRL_REG)); + + iounmap(p); + + device_set_wakeup_enable(dev, true); + + pci_wake_from_d3(pcidev, true); + + return 0; +} + +static int pci1xxxx_resume(struct device *dev) +{ + struct pci1xxxx_8250 *priv = dev_get_drvdata(dev); + struct pci_dev *pcidev = to_pci_dev(dev); + unsigned int data; + void __iomem *p; + int i; + + p = pci_ioremap_bar(pcidev, 0); + if (!p) { + dev_err(dev, "remapping of bar 0 memory failed"); + return -ENOMEM; + } + + data = readl(p + UART_RESET_REG); + writel(data & ~UART_RESET_D3_RESET_DISABLE, p + UART_RESET_REG); + iounmap(p); + + for (i = 0; i < priv->nr; i++) { + if (priv->line[i] >= 0) { + pci1xxxx_port_resume(priv->line[i]); + serial8250_resume_port(priv->line[i]); + } + } + + return 0; +} + static int pci1xxxx_serial_probe(struct pci_dev *dev, const struct pci_device_id *ent) { @@ -427,6 +533,9 @@ static void pci1xxxx_serial_remove(struct pci_dev *dev) } } +static DEFINE_SIMPLE_DEV_PM_OPS(pci1xxxx_pm_ops, pci1xxxx_suspend, + pci1xxxx_resume); + static const struct pci_device_id pci1xxxx_pci_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_MCHP_PCI1XXXX, PCI_DEVICE_ID_MCHP_PCI11010) }, { PCI_DEVICE(PCI_VENDOR_ID_MCHP_PCI1XXXX, PCI_DEVICE_ID_MCHP_PCI11101) }, @@ -441,6 +550,9 @@ static struct pci_driver pci1xxxx_pci_driver = { .name = "pci1xxxx serial", .probe = pci1xxxx_serial_probe, .remove = pci1xxxx_serial_remove, + .driver = { + .pm = pm_sleep_ptr(&pci1xxxx_pm_ops), + }, .id_table = pci1xxxx_pci_tbl, }; -- 2.25.1