Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp987216rwb; Sat, 1 Oct 2022 12:29:22 -0700 (PDT) X-Google-Smtp-Source: AMsMyM72NNfIwNV+8ZemkvkiH1RValpS+Ku4MWN2oToX2d5rEYlSfe5LhsLPosLT2M8Fl3X4iCkl X-Received: by 2002:a63:7b09:0:b0:43b:ed4a:d71a with SMTP id w9-20020a637b09000000b0043bed4ad71amr13019824pgc.257.1664652562101; Sat, 01 Oct 2022 12:29:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664652562; cv=none; d=google.com; s=arc-20160816; b=r7g1hiJ2PyZ6cCYh2mAKzGeVTxkeSoufiJMAr28dtC1SpZMuQ3mr1pGdB6kqkTOmAO NienmkDpQ7zcQDt8z0NY75HNPeeQeG+8bIb5s7NvU+EhhWUqVJFN2eoLkpb8+PnycDN1 tKCAMAE/khmmVFuUgsNq/X51FGFObuTy7rSMp/pGyIpa3kHHjQt5D+sWADkBfkp7UkWb JBIiPdKtUnjMGHSrsKssVHqN7nXQCcmz8Ffe3qH2pYZAwVOfbCMUrwpoI2JLy3L6VEZV HVkJq8DTvyI1G3Kv9O0msOyRqKev4T0ITgE/yRAz6wJk3I1NqRCzMXeIVmDCKz4Zt3X7 015w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=Pt1R9lcVy/G73QlzU0SAO2jcWqHbpcxuiJIVKVk1XNU=; b=m58Wd3jdTLogkTsuRaHcDLZGFvFlf4Dzuv/EATom/J4y2FqLvMPBscGTx6JYMJMw3h jnvFJptb1VxrCLEBKVcUdRlxX+Xr0jmKc+nHLYQTTZWHu7XPir6ve1knU+W9dNfx3wTJ N8kIRd2rGKFI7aWNkXfpPzmYQ+ouJ4xPsrKvzQBJeBXL7z9H3jVSDn9yu3xnr7wwj+PS 3IhSHGCWi7Fb8ITROZEW4u0GsFsphw5yvhAGIz6dhQzRaqDHoRsFCQ0DneZcyn1yE4q6 YduLSbWp5v4x6i6Zuj8azIZ4RNKD4AH0cjkIn5ACsZUWgkaCgMuXXh0cFofnyMVHvHjk 353w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id h6-20020a170902f54600b001781675f424si7007070plf.548.2022.10.01.12.29.09; Sat, 01 Oct 2022 12:29:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229488AbiJATCZ (ORCPT + 99 others); Sat, 1 Oct 2022 15:02:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51362 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229548AbiJATCW (ORCPT ); Sat, 1 Oct 2022 15:02:22 -0400 Received: from m-r2.th.seeweb.it (m-r2.th.seeweb.it [5.144.164.171]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D99A2356E3 for ; Sat, 1 Oct 2022 12:02:20 -0700 (PDT) Received: from TimeMachine.lan (adsl-dyn13.78-99-1.t-com.sk [78.99.1.13]) by m-r2.th.seeweb.it (Postfix) with ESMTPA id B3C4E3F326; Sat, 1 Oct 2022 20:53:26 +0200 (CEST) From: Martin Botka To: martin.botka1@gmail.com Cc: ~postmarketos/upstreaming@lists.sr.ht, Konrad Dybcio , AngeloGioacchino Del Regno , Marijn Suijten , Jami Kettunen , Paul Bouchara , Martin Botka , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/1] arm64: dts: qcom: sm6125: Add dispcc node Date: Sat, 1 Oct 2022 20:53:21 +0200 Message-Id: <20221001185321.492532-1-martin.botka@somainline.org> X-Mailer: git-send-email 2.37.3 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.6 required=5.0 tests=BAYES_00,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the dispcc node for the newly added DISPCC driver for Qualcomm Technology Inc's SM6125 SoC. Signed-off-by: Martin Botka --- arch/arm64/boot/dts/qcom/sm6125.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6125.dtsi b/arch/arm64/boot/dts/qcom/sm6125.dtsi index 62f216bfca4f..ffbcee009279 100644 --- a/arch/arm64/boot/dts/qcom/sm6125.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6125.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2021, Martin Botka */ +#include #include #include #include @@ -367,6 +368,17 @@ soc { ranges = <0x00 0x00 0x00 0xffffffff>; compatible = "simple-bus"; + dispcc: clock-controller@5f00000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "qcom,dispcc-sm6125"; + reg = <0x5f00000 0x20000>; + clocks = <&gcc GCC_DISP_AHB_CLK>; + clock-names = "cfg_ahb_clk"; + #clock-cells = <1>; + #power-domain-cells = <1>; + }; + tcsr_mutex: hwlock@340000 { compatible = "qcom,tcsr-mutex"; reg = <0x00340000 0x20000>; -- 2.37.3