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Date:   Mon, 03 Oct 2022 14:06:30 -0700
From:   "H. Peter Anvin" <hpa@zytor.com>
To:     Nadav Amit <namit@vmware.com>,
        Vitaly Kuznetsov <vkuznets@redhat.com>,
        Alexander Graf <graf@amazon.com>
CC:     Ajay Kaher <akaher@vmware.com>, "x86@kernel.org" <x86@kernel.org>,
        "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "rostedt@goodmis.org" <rostedt@goodmis.org>,
        Srivatsa Bhat <srivatsab@vmware.com>,
        "srivatsa@csail.mit.edu" <srivatsa@csail.mit.edu>,
        Alexey Makhalov <amakhalov@vmware.com>,
        Vasavi Sirnapalli <vsirnapalli@vmware.com>,
        "er.ajay.kaher@gmail.com" <er.ajay.kaher@gmail.com>,
        "willy@infradead.org" <willy@infradead.org>,
        "linux-hyperv@vger.kernel.org" <linux-hyperv@vger.kernel.org>,
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        Thomas Gleixner <tglx@linutronix.de>,
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Subject: Re: [PATCH v2] x86/PCI: Prefer MMIO over PIO on all hypervisor
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On October 3, 2022 10:34:15 AM PDT, Nadav Amit <namit@vmware=2Ecom> wrote:
>On Oct 3, 2022, at 8:03 AM, Vitaly Kuznetsov <vkuznets@redhat=2Ecom> wrot=
e:
>
>> Not my but rather PCI maintainer's call but IMHO dropping 'const' is
>> better, introducing a new global var is our 'last resort' and should be
>> avoided whenever possible=2E Alternatively, you can add a
>> raw_pci_ext_ops_preferred() function checking somethin within 'struct
>> hypervisor_x86' but I'm unsure if it's better=2E
>>=20
>> Also, please check Alex' question/suggestion=2E
>
>Here is my take (and Ajay knows probably more than me):
>
>Looking briefly on MCFG, I do not see a clean way of using the ACPI table=
=2E
>The two options are either to use a reserved field (which who knows, migh=
t
>be used one day) or some OEM ID=2E I am also not familiar with
>PCI_COMMAND=2EMEMORY=3D0, so Ajay can hopefully give some answer about th=
at=2E
>
>Anyhow, I understand (although not relate) to the objection for a new glo=
bal
>variable=2E How about explicitly calling this hardware bug a =E2=80=9Cbug=
=E2=80=9D and using
>the proper infrastructure? Calling it explicitly a bug may even push whoe=
ver
>can to resolve it=2E
>
>IOW, how about doing something along the lines of (not tested):
>
>
>-- >8 --
>
>Subject: [PATCH] x86/PCI: Prefer MMIO over PIO on VMware hypervisor
>
>---
> arch/x86/include/asm/cpufeatures=2Eh | 1 +
> arch/x86/kernel/cpu/common=2Ec       | 2 ++
> arch/x86/kernel/cpu/vmware=2Ec       | 2 ++
> arch/x86/pci/common=2Ec              | 6 ++++--
> 4 files changed, 9 insertions(+), 2 deletions(-)
>
>diff --git a/arch/x86/include/asm/cpufeatures=2Eh b/arch/x86/include/asm/=
cpufeatures=2Eh
>index ef4775c6db01=2E=2E216b6f357b6d 100644
>--- a/arch/x86/include/asm/cpufeatures=2Eh
>+++ b/arch/x86/include/asm/cpufeatures=2Eh
>@@ -460,5 +460,6 @@
> #define X86_BUG_MMIO_UNKNOWN		X86_BUG(26) /* CPU is too old and its MMIO=
 Stale Data status is unknown */
> #define X86_BUG_RETBLEED		X86_BUG(27) /* CPU is affected by RETBleed */
> #define X86_BUG_EIBRS_PBRSB		X86_BUG(28) /* EIBRS is vulnerable to Post =
Barrier RSB Predictions */
>+#define X86_BUG_ECAM_MMIO		X86_BUG(29) /* ECAM MMIO is buggy and PIO is =
preferable */
>=20
> #endif /* _ASM_X86_CPUFEATURES_H */
>diff --git a/arch/x86/kernel/cpu/common=2Ec b/arch/x86/kernel/cpu/common=
=2Ec
>index 3e508f239098=2E=2Ec94175fa304b 100644
>--- a/arch/x86/kernel/cpu/common=2Ec
>+++ b/arch/x86/kernel/cpu/common=2Ec
>@@ -1299,6 +1299,8 @@ static void __init cpu_set_bug_bits(struct cpuinfo_=
x86 *c)
> {
> 	u64 ia32_cap =3D x86_read_arch_cap_msr();
>=20
>+	setup_force_cpu_bug(X86_BUG_ECAM_MMIO);
>+
> 	/* Set ITLB_MULTIHIT bug if cpu is not in the whitelist and not mitigat=
ed */
> 	if (!cpu_matches(cpu_vuln_whitelist, NO_ITLB_MULTIHIT) &&
> 	    !(ia32_cap & ARCH_CAP_PSCHANGE_MC_NO))
>diff --git a/arch/x86/kernel/cpu/vmware=2Ec b/arch/x86/kernel/cpu/vmware=
=2Ec
>index 02039ec3597d=2E=2E8903776284a6 100644
>--- a/arch/x86/kernel/cpu/vmware=2Ec
>+++ b/arch/x86/kernel/cpu/vmware=2Ec
>@@ -385,6 +385,8 @@ static void __init vmware_set_capabilities(void)
> 		setup_force_cpu_cap(X86_FEATURE_VMCALL);
> 	else if (vmware_hypercall_mode =3D=3D CPUID_VMWARE_FEATURES_ECX_VMMCALL=
)
> 		setup_force_cpu_cap(X86_FEATURE_VMW_VMMCALL);
>+
>+	setup_clear_cpu_cap(X86_BUG_ECAM_MMIO);
> }
>=20
> static void __init vmware_platform_setup(void)
>diff --git a/arch/x86/pci/common=2Ec b/arch/x86/pci/common=2Ec
>index ddb798603201=2E=2Ebc81cf4c1014 100644
>--- a/arch/x86/pci/common=2Ec
>+++ b/arch/x86/pci/common=2Ec
>@@ -40,7 +40,8 @@ const struct pci_raw_ops *__read_mostly raw_pci_ext_ops=
;
> int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int dev=
fn,
> 						int reg, int len, u32 *val)
> {
>-	if (domain =3D=3D 0 && reg < 256 && raw_pci_ops)
>+	if (domain =3D=3D 0 && reg < 256 && raw_pci_ops &&
>+	    (boot_cpu_has_bug(X86_BUG_ECAM_MMIO) || !raw_pci_ext_ops))
> 		return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
> 	if (raw_pci_ext_ops)
> 		return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
>@@ -50,7 +51,8 @@ int raw_pci_read(unsigned int domain, unsigned int bus,=
 unsigned int devfn,
> int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int de=
vfn,
> 						int reg, int len, u32 val)
> {
>-	if (domain =3D=3D 0 && reg < 256 && raw_pci_ops)
>+	if (domain =3D=3D 0 && reg < 256 && raw_pci_ops &&
>+	    (boot_cpu_has_bug(X86_BUG_ECAM_MMIO) || !raw_pci_ext_ops))
> 		return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
> 	if (raw_pci_ext_ops)
> 		return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);

Also=2E=2E=2E any reason we can't just set raw_pci_ops =3D=3D raw_ext_pci_=
ops for the case when the latter is preferred, and dispense with the condit=
ionals in the use path? Similarly, raw_ext_pci_ops could be pointed to erro=
r routines instead of left at NULL=2E