Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp262525rwb; Tue, 4 Oct 2022 03:49:02 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6aONtEG3N3Tc44I/lfLHOcEVv3pYCHSPYakNQju06bZO52Iq7GU7PhPEUvqT+WzIDYg9Qz X-Received: by 2002:aa7:81cf:0:b0:561:7d72:73ef with SMTP id c15-20020aa781cf000000b005617d7273efmr8035554pfn.16.1664880542387; Tue, 04 Oct 2022 03:49:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664880542; cv=none; d=google.com; s=arc-20160816; b=kWqbKmS4FrJIPnZvWRtLiE2p7HkDgp0cbJP0S+2rhWw9WvziM7ycNWbMd7kGGaymQz dFlvh3Tuoo4pSMqk/cLl0pp6xvkviVGlokwWlJ8JxhmHcL9dadNPzpnUntELps96iV16 yPdzy3SVmw0zleKpFpxJ8qsktY3xib8KRSkGVvCCrO43Twrr2srd5ibHg4kvqmnE5dvX o29/N9Gm7bPBCuc4FKvRQAMbN2Z/XIDauzrPucHHwbvNtKlJXSOx9XF438O9xpMSpS1G VvYUx7BNtF2r/fwQ7lZN5/K1Re79Ops/4rAoYfDeHGmxgoOOjwWU0E0cTOG1JnaK3X06 /CPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :references:cc:to:content-language:subject:user-agent:mime-version :date:message-id; bh=IZEIVtJaSixgG/hxF05VHdgPhWnXSQhN5kp3UnUtBwM=; b=NJe8nLFyf35IWV/hRTVwM3y91/utTyPORwuYwi6gFI5WSZmfaivVYNgVncwCBXH9Wx 6JaIOKX0c/HgclJVxd7QkeIOBZkRCYaDSLJE0cj1goDn28AA8XW4iIsiKe2wVq9alUsb /3lhWQsX5oiL/17J+a2Xgd26LpPoYeXQTiAKOitzCpcT3Nx+dnsTRELMGqA2dGnAG54d /FiRHWcrXMuhfP+P3Aslzr1Ed7J66UZKWM7CXVJAkx4sZkfG3bN01KdKOd12SvaLw/C5 EFhChOeg10L3hPbITARdoFvSSscmoA0R/CY6b6vQjmXYP13r1bmwNyN2xH4KO+a5dpWO 6EHw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z5-20020a170903018500b00172f9a9df91si14540627plg.23.2022.10.04.03.48.50; Tue, 04 Oct 2022 03:49:02 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229732AbiJDK0d (ORCPT + 99 others); Tue, 4 Oct 2022 06:26:33 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229662AbiJDK0b (ORCPT ); Tue, 4 Oct 2022 06:26:31 -0400 Received: from mx.gpxsee.org (mx.gpxsee.org [37.205.14.76]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 00C882B621; Tue, 4 Oct 2022 03:26:28 -0700 (PDT) Received: from [192.168.42.220] (14-nat1-1.centrio.cz [217.195.172.14]) by mx.gpxsee.org (Postfix) with ESMTPSA id C095435502; Tue, 4 Oct 2022 12:26:26 +0200 (CEST) Message-ID: Date: Tue, 4 Oct 2022 12:26:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.12.0 Subject: Re: [PATCH V5 XDMA 2/2] dmaengine: xilinx: xdma: Add user logic interrupt support Content-Language: en-US To: Lizhi Hou , vkoul@kernel.org, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, trix@redhat.com Cc: max.zhen@amd.com, sonal.santan@amd.com, larry.liu@amd.com, brian.xu@amd.com References: <1664409507-64079-1-git-send-email-lizhi.hou@amd.com> <1664409507-64079-3-git-send-email-lizhi.hou@amd.com> <33583d7f-8f8c-64a1-7b93-4e6aebb266a3@gpxsee.org> <1836ce13-101f-a863-41ea-bd49c21d4f60@amd.com> From: =?UTF-8?Q?Martin_T=c5=afma?= In-Reply-To: <1836ce13-101f-a863-41ea-bd49c21d4f60@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,NICE_REPLY_A, SPF_HELO_NONE,SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 03. 10. 22 17:52, Lizhi Hou wrote: > > On 10/3/22 06:59, Martin Tůma wrote: >> On 29. 09. 22 1:58, Lizhi Hou wrote: >>> The Xilinx DMA/Bridge Subsystem for PCIe (XDMA) provides up to 16 user >>> interrupt wires to user logic that generate interrupts to the host. >>> This patch adds APIs to enable/disable user logic interrupt for a given >>> interrupt wire index. >>> >>> Signed-off-by: Lizhi Hou >>> Signed-off-by: Sonal Santan >>> Signed-off-by: Max Zhen >>> Signed-off-by: Brian Xu >>> --- >>>   MAINTAINERS                  |  1 + >>>   drivers/dma/xilinx/xdma.c    | 65 >>> ++++++++++++++++++++++++++++++++++++ >>>   include/linux/dma/amd_xdma.h | 16 +++++++++ >>>   3 files changed, 82 insertions(+) >>>   create mode 100644 include/linux/dma/amd_xdma.h >>> >>> diff --git a/MAINTAINERS b/MAINTAINERS >>> index c1be0b2e378a..019d84b2b086 100644 >>> --- a/MAINTAINERS >>> +++ b/MAINTAINERS >>> @@ -21691,6 +21691,7 @@ L:    dmaengine@vger.kernel.org >>>   S:    Supported >>>   F:    drivers/dma/xilinx/xdma-regs.h >>>   F:    drivers/dma/xilinx/xdma.c >>> +F:    include/linux/dma/amd_xdma.h >>>   F:    include/linux/platform_data/amd_xdma.h >>>     XILINX ZYNQMP DPDMA DRIVER >>> diff --git a/drivers/dma/xilinx/xdma.c b/drivers/dma/xilinx/xdma.c >>> index 58a57e03bef5..13f627445c4a 100644 >>> --- a/drivers/dma/xilinx/xdma.c >>> +++ b/drivers/dma/xilinx/xdma.c >>> @@ -25,6 +25,7 @@ >>>   #include >>>   #include >>>   #include >>> +#include >>>   #include >>>   #include >>>   #include >>> @@ -736,6 +737,7 @@ static int xdma_set_vector_reg(struct >>> xdma_device *xdev, u32 vec_tbl_start, >>>   static int xdma_irq_init(struct xdma_device *xdev) >>>   { >>>       u32 irq = xdev->irq_start; >>> +    u32 user_irq_start; >>>       int i, j, ret; >>>         /* return failure if there are not enough IRQs */ >>> @@ -786,6 +788,18 @@ static int xdma_irq_init(struct xdma_device *xdev) >>>           goto failed; >>>       } >>>   +    /* config user IRQ registers if needed */ >>> +    user_irq_start = xdev->h2c_chan_num + xdev->c2h_chan_num; >>> +    if (xdev->irq_num > user_irq_start) { >>> +        ret = xdma_set_vector_reg(xdev, XDMA_IRQ_USER_VEC_NUM, >>> +                      user_irq_start, >>> +                      xdev->irq_num - user_irq_start); >>> +        if (ret) { >>> +            xdma_err(xdev, "failed to set user vectors: %d", ret); >>> +            goto failed; >>> +        } >>> +    } >>> + >>>       /* enable interrupt */ >>>       ret = xdma_enable_intr(xdev); >>>       if (ret) { >>> @@ -816,6 +830,57 @@ static bool xdma_filter_fn(struct dma_chan >>> *chan, void *param) >>>       return true; >>>   } >>>   +/** >>> + * xdma_disable_user_irq - Disable user interrupt >>> + * @pdev: Pointer to the platform_device structure >>> + * @user_irq_index: User IRQ index >>> + */ >>> +void xdma_disable_user_irq(struct platform_device *pdev, u32 >>> user_irq_index) >>> +{ >>> +    struct xdma_device *xdev = platform_get_drvdata(pdev); >>> + >>> +    if (xdev->h2c_chan_num + xdev->c2h_chan_num + user_irq_index >= >>> +        xdev->irq_num) { >>> +        xdma_err(xdev, "invalid user irq index"); >>> +        return; >>> +    } >>> + >>> +    xdma_write_reg(xdev, XDMA_IRQ_BASE, XDMA_IRQ_USER_INT_EN_W1C, >>> +               (1 << user_irq_index)); >>> +} >>> +EXPORT_SYMBOL(xdma_disable_user_irq); >>> + >>> +/** >>> + * xdma_enable_user_irq - Enable user logic interrupt >>> + * @pdev: Pointer to the platform_device structure >>> + * @user_irq_index: User logic IRQ wire index >>> + * @irq: Pointer to returning system IRQ number >>> + */ >>> +int xdma_enable_user_irq(struct platform_device *pdev, u32 >>> user_irq_index, >>> +             u32 *irq) >>> +{ >>> +    struct xdma_device *xdev = platform_get_drvdata(pdev); >>> +    u32 user_irq; >>> +    int ret; >>> + >>> +    user_irq = xdev->h2c_chan_num + xdev->c2h_chan_num + >>> user_irq_index; >>> +    if (user_irq >= xdev->irq_num) { >>> +        xdma_err(xdev, "invalid user irq index"); >>> +        return -EINVAL; >>> +    } >>> + >>> +    ret = xdma_write_reg(xdev, XDMA_IRQ_BASE, >>> XDMA_IRQ_USER_INT_EN_W1S, >>> +                 (1 << user_irq_index)); >>> +    if (ret) { >>> +        xdma_err(xdev, "set user irq mask failed, %d", ret); >>> +        return ret; >>> +    } >>> +    *irq = user_irq + xdev->irq_start; >>> + >>> +    return 0; >>> +} >>> +EXPORT_SYMBOL(xdma_enable_user_irq); >>> + >>>   /** >>>    * xdma_remove - Driver remove function >>>    * @pdev: Pointer to the platform_device structure >>> diff --git a/include/linux/dma/amd_xdma.h >>> b/include/linux/dma/amd_xdma.h >>> new file mode 100644 >>> index 000000000000..91fb02ff93a7 >>> --- /dev/null >>> +++ b/include/linux/dma/amd_xdma.h >>> @@ -0,0 +1,16 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-or-later */ >>> +/* >>> + * Copyright (C) 2022, Advanced Micro Devices, Inc. >>> + */ >>> + >>> +#ifndef _DMAENGINE_AMD_XDMA_H >>> +#define _DMAENGINE_AMD_XDMA_H >>> + >>> +#include >>> +#include >>> + >>> +int xdma_enable_user_irq(struct platform_device *pdev, u32 >>> user_irq_index, >>> +             u32 *irq); >>> +void xdma_disable_user_irq(struct platform_device *pdev, u32 >>> user_irq_index); >>> + >>> +#endif /* _DMAENGINE_AMD_XDMA_H */ >> >> Hi, >> While rewriting our V4L2 driver to use your XDMA driver, I realized, >> that the API for the user interrupts is still not fully usable. If >> the expected outcome is that the "parent" driver using the xdma >> driver knows nothing about the IRQ allocation in XDMA, then the >> xdma_enable_user_irq() function must be split into two separate >> functions: >> >> int xdma_enable_user_irq(struct platform_device *pdev, u32 >> user_irq_index) >> >> and >> >> int xdma_get_system_irq(u32 user_irq_index) >> >> that returns the system IRQ number for the given user_irq_index. >> Because without it you can not get the system IRQ number without >> enabling the irq at the same time which is usually not what you want. > > Is this because the user logic you are using does not have > disable/enable interrupt by itself?  I thought that the user logic IP > would have its own register to enable/disable interrupt. > Yes. Our HW has no "own" registers to disable the IRQs. As such registers are already there in XDMA, there was no need for them. > And xdma_enable_user_irq() will only be called once for creating the > user logic platform device. Then, user logic IP driver would use its > own register to control interrupts. The existing platform driver does > not call any xdma_* to control interrupt. > As you can see, there is HW that was designed to use the XDMA registers during normal operation and separate enable/disable and irq mapping functions are required. Maybe it is not the best HW design, but it can evidently happen and then the driver author is screwed with the merged API. M. > > Thanks, > > Lizhi > >> >> As a workaround, you can compute the system IRQ yourself with the >> knowledge of the XDMA internals (this is what I have to do at the >> moment in our driver), but then the "u32 *irq" parameter becomes >> useless and can be removed anyway. >> >> M.