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References: <20221001061507.3508603-1-kumaravel.thiagarajan@microchip.com>
 <20221001061507.3508603-2-kumaravel.thiagarajan@microchip.com> <676c5723-a9b7-9f28-fbb4-27a5c6f6145b@wanadoo.fr>
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From:   Andy Shevchenko <andy.shevchenko@gmail.com>
Date:   Tue, 4 Oct 2022 12:46:39 +0300
Message-ID: <CAHp75VeS5oA6mOrmXGX2u=x1fL3ZqHZDURYHhA8J1hBpXm-KSQ@mail.gmail.com>
Subject: Re: [PATCH v2 tty-next 1/3] 8250: microchip: pci1xxxx: Add driver for
 quad-uart support.
To:     Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Cc:     Kumaravel Thiagarajan <kumaravel.thiagarajan@microchip.com>,
        gregkh@linuxfoundation.org, jirislaby@kernel.org,
        ilpo.jarvinen@linux.intel.com, u.kleine-koenig@pengutronix.de,
        johan@kernel.org, wander@redhat.com,
        etremblay@distech-controls.com, macro@orcam.me.uk,
        geert+renesas@glider.be, jk@ozlabs.org, phil.edworthy@renesas.com,
        lukas@wunner.de, linux-kernel@vger.kernel.org,
        linux-serial@vger.kernel.org, UNGLinuxDriver@microchip.com
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On Mon, Oct 3, 2022 at 10:36 PM Christophe JAILLET
<christophe.jaillet@wanadoo.fr> wrote:
> Le 01/10/2022 =C3=A0 08:15, Kumaravel Thiagarajan a =C3=A9crit :

...

> > +     if (pci_resource_flags(dev, 0) & IORESOURCE_MEM) {
> > +             if (!pcim_iomap(dev, 0, 0) && !pcim_iomap_table(dev))
> > +                     return -ENOMEM;
> > +
> > +             port->port.iotype =3D UPIO_MEM;
> > +             port->port.iobase =3D 0;
> > +             port->port.mapbase =3D pci_resource_start(dev, 0) + offse=
t;
> > +             port->port.membase =3D pcim_iomap_table(dev)[0] + offset;

> Is it needed to call pcim_iomap_table(dev) twice? (here and a few lines
> above in the 'if')

Yes. But the main question I asked (if we really need IO ports
support) still remains.

> > +             port->port.regshift =3D 0;
> > +     } else {
> > +             port->port.iotype =3D UPIO_PORT;
> > +             port->port.iobase =3D pci_resource_start(dev, 0) + offset=
;
> > +             port->port.mapbase =3D 0;
> > +             port->port.membase =3D NULL;
> > +             port->port.regshift =3D 0;
> > +     }

--=20
With Best Regards,
Andy Shevchenko