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[78.11.189.27]) by smtp.gmail.com with ESMTPSA id p13-20020a2eb98d000000b0026c297a9e11sm497925ljp.133.2022.10.04.07.59.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 04 Oct 2022 07:59:03 -0700 (PDT) Message-ID: <6444e5d1-0fc9-03e2-9b2a-ec19fa1e7757@linaro.org> Date: Tue, 4 Oct 2022 16:59:02 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 Subject: Re: [PATCH v3 net-next 12/14] dt-bindings: net: dsa: ocelot: add ocelot-ext documentation Content-Language: en-US To: Vladimir Oltean Cc: Colin Foster , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Russell King , Linus Walleij , UNGLinuxDriver@microchip.com, Alexandre Belloni , Claudiu Manoil , Lee Jones , Krzysztof Kozlowski , Rob Herring , Paolo Abeni , Jakub Kicinski , Eric Dumazet , "David S. Miller" , Florian Fainelli , Vivien Didelot , Andrew Lunn References: <20220926002928.2744638-1-colin.foster@in-advantage.com> <20220926002928.2744638-13-colin.foster@in-advantage.com> <20221004121517.4j5637hnioepsxgd@skbuf> From: Krzysztof Kozlowski In-Reply-To: <20221004121517.4j5637hnioepsxgd@skbuf> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 04/10/2022 14:15, Vladimir Oltean wrote: > On Tue, Oct 04, 2022 at 01:19:33PM +0200, Krzysztof Kozlowski wrote: >>> + # Ocelot-ext VSC7512 >>> + - | >>> + spi { >>> + soc@0 { >> >> soc in spi is a bit confusing. > > Do you have a better suggestion for a node name? This is effectively a > container for peripherals which would otherwise live under a /soc node, /soc node implies it does not live under /spi node. Otherwise it would be /spi/soc, right? > if they were accessed over MMIO by the internal microprocessor of the > SoC, rather than by an external processor over SPI. > >> How is this example different than previous one (existing soc example)? >> If by compatible and number of ports, then there is no much value here. > > The positioning relative to the other nodes is what's different. Positioning of nodes is not worth another example, if everything else is the same. What is here exactly tested or shown by example? Using a device in SPI controller? Best regards, Krzysztof