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Date:   Tue, 4 Oct 2022 16:57:08 +0200
From:   Marcus Folkesson <marcus.folkesson@gmail.com>
To:     Leonard =?iso-8859-1?Q?G=F6hrs?= <l.goehrs@pengutronix.de>
Cc:     Jonathan Cameron <jic23@kernel.org>,
        Lars-Peter Clausen <lars@metafoo.de>, kernel@pengutronix.de,
        linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org
Subject: Re: [PATCH v1 2/2] iio: adc: add ADC driver for the TI LMP92064
 controller
Message-ID: <YzxJxCSHP9tGHge6@gmail.com>
References: <20221004134238.3144326-1-l.goehrs@pengutronix.de>
 <20221004134238.3144326-2-l.goehrs@pengutronix.de>
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Hi,

Overall, a lot of comments does not have the right formatting.
Please run scripts/checkpatch.pl.

On Tue, Oct 04, 2022 at 03:42:38PM +0200, Leonard G=F6hrs wrote:
> The TI LMP92064 is a dual 12 Bit ADC connected via SPI.
> The two channels are intended for simultaneous measurements of the voltage
> across- and current through a load to allow accurate instantaneous power
> measurements.
> The driver does not yet take advantage of this feature, as buffering is n=
ot yet
> implemented.
>=20
> Signed-off-by: Leonard G=F6hrs <l.goehrs@pengutronix.de>
> ---
> +static const struct iio_chan_spec lmp92064_adc_channels[] =3D {
> +	{
> +		.type =3D IIO_CURRENT,
> +		.address =3D TI_LMP92064_CHAN_INC,
> +		.info_mask_separate =3D
> +			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
> +		.datasheet_name =3D "INC",
> +	},
> +	{
> +		.type =3D IIO_VOLTAGE,
> +		.address =3D TI_LMP92064_CHAN_INV,
> +		.info_mask_separate =3D
> +			BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
> +		.datasheet_name =3D "INV",
> +	},
> +};
> +

[...]

> +static int lmp92064_write_reg(struct lmp92064_adc_priv *priv, u16 reg, u=
8 val)
> +static int lmp92064_read_reg(struct lmp92064_adc_priv *priv, u16 reg, u8=
 *val)

Does not regmap work for this?

[...]

> +static int lmp92064_adc_probe(struct spi_device *spi)
> +{
> +	struct device *dev =3D &spi->dev;
> +	struct lmp92064_adc_priv *priv;
> +	struct iio_dev *indio_dev;
> +	struct gpio_desc *gpio_reset;
> +	int ret;
> +	u32 shunt_resistor;
> +
> +	spi->bits_per_word =3D 8;
> +	spi->mode &=3D ~SPI_MODE_X_MASK;
> +	spi->mode |=3D SPI_MODE_0;
> +	ret =3D spi_setup(spi);
> +	if (ret < 0)
> +		return dev_err_probe(dev, ret, "Error in SPI setup\n");
> +
> +	indio_dev =3D devm_iio_device_alloc(dev, sizeof(*priv));
> +	if (!indio_dev)
> +		return -ENOMEM;
> +
> +	priv =3D iio_priv(indio_dev);
> +
> +	priv->spi =3D spi;
> +
> +	ret =3D of_property_read_u32(dev->of_node, "shunt-resistor",
> +				   &shunt_resistor);

device_property_read_u32() ?


> +	if (ret < 0)
> +		return dev_err_probe(dev, ret,

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