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Wed, 05 Oct 2022 09:53:36 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Wed, 5 Oct 2022 09:53:34 +0800 Received: from mtksdccf07 (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Wed, 5 Oct 2022 09:53:34 +0800 Message-ID: Subject: Re: [PATCH v1 2/6] dts: arm64: mt8195: add MMSYS and MUTEX configuration for VPPSYS From: moudy ho To: Allen-KH Cheng =?UTF-8?Q?=28=E7=A8=8B=E5=86=A0=E5=8B=B3=29?= , "matthias.bgg@gmail.com" , "chunkuang.hu@kernel.org" , "angelogioacchino.delregno@collabora.com" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" CC: "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , "linux-mediatek@lists.infradead.org" , "Roy-CW Yeh =?UTF-8?Q?=28=E8=91=89=E4=B8=AD=E7=91=8B=29?=" , "devicetree@vger.kernel.org" , Project_Global_Chrome_Upstream_Group Date: Wed, 5 Oct 2022 09:53:34 +0800 In-Reply-To: References: <20221004093319.5069-1-moudy.ho@mediatek.com> <20221004093319.5069-3-moudy.ho@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.5-0ubuntu0.18.04.2 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-MTK: N X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS, SPF_PASS,UNPARSEABLE_RELAY,URIBL_CSS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 2022-10-04 at 19:46 +0800, Allen-KH Cheng (程冠勳) wrote: > Hi Moudy, > > On Tue, 2022-10-04 at 17:33 +0800, Moudy Ho wrote: > > From: "Roy-CW.Yeh" > > > > Compatible names of VPPSYS0 and VPPSYS1 should be renamed to > > "mediatek,mt8195-mmsys" to match the description of the binding > > file. > > Also, add two nodes for MT8195 VPPSYS0/1 MUTEX. > > > > Signed-off-by: Roy-CW.Yeh > > --- > > arch/arm64/boot/dts/mediatek/mt8195.dtsi | 22 > > ++++++++++++++++++++-- > > 1 file changed, 20 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi > > b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > > index 905d1a90b406..7f54fa7d0185 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi > > +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi > > @@ -1477,11 +1477,20 @@ > > }; > > > > vppsys0: clock-controller@14000000 { > > - compatible = "mediatek,mt8195-vppsys0"; > > + compatible = "mediatek,mt8195-mmsys"; > > reg = <0 0x14000000 0 0x1000>; > > + mediatek,gce-client-reg = <&gce1 > > SUBSYS_1400XXXX 0 0x1000>; > > #clock-cells = <1>; > > }; > > > > I run "ARCH=arm64 make dtbs check" and some of the tests failed. > > The node name should be 'syscon' from mediatek/mediatek,mmsys.yaml. > > > > + vpp0-mutex@1400f000 { > > + compatible = "mediatek,mt8195-vpp-mutex"; > > + reg = <0 0x1400f000 0 0x1000>; > > + mediatek,gce-client-reg = <&gce1 > > SUBSYS_1400XXXX 0xf000 0x1000>; > > + clocks = <&vppsys0 CLK_VPP0_MUTEX>; > > + power-domains = <&spm > > MT8195_POWER_DOMAIN_VPPSYS0>; > > + }; > > + > > 'interrupts' is a required property from mediatek/mediatek,mutex.yaml > > > > smi_sub_common_vpp0_vpp1_2x1: smi@14010000 { > > compatible = "mediatek,mt8195-smi-sub-common"; > > reg = <0 0x14010000 0 0x1000>; > > @@ -1582,11 +1591,20 @@ > > }; > > > > vppsys1: clock-controller@14f00000 { > > - compatible = "mediatek,mt8195-vppsys1"; > > + compatible = "mediatek,mt8195-mmsys"; > > reg = <0 0x14f00000 0 0x1000>; > > + mediatek,gce-client-reg = <&gce1 > > SUBSYS_14f0XXXX 0 0x1000>; > > Node name: syscon. > > > #clock-cells = <1>; > > }; > > > > + vpp1-mutex@14f01000 { > > + compatible = "mediatek,mt8195-vpp-mutex"; > > + reg = <0 0x14f01000 0 0x1000>; > > + mediatek,gce-client-reg = <&gce1 > > SUBSYS_14f0XXXX 0x1000 0x1000>; > > + clocks = <&vppsys1 CLK_VPP1_DISP_MUTEX>; > > + power-domains = <&spm > > MT8195_POWER_DOMAIN_VPPSYS1>; > > + }; > > + > > 'interrupts' is a required property > > Thanks, > Allen > Hi Allen, Apologies for the failed test, I'll check again by adding dtsb_check instead of just dt_binding_check . Thanks & Regards, Moudy > > larb5: larb@14f02000 { > > compatible = "mediatek,mt8195-smi-larb"; > > reg = <0 0x14f02000 0 0x1000>; > > >