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From:   Bjorn Helgaas <helgaas@kernel.org>
To:     linux-pci@vger.kernel.org
Cc:     Vidya Sagar <vidyas@nvidia.com>,
        "Saheed O . Bolarinwa" <refactormyself@gmail.com>,
        Lorenzo Pieralisi <lpieralisi@kernel.org>,
        =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= <kw@linux.com>,
        Rajat Jain <rajatja@google.com>,
        "Kenneth R . Crudup" <kenny@panix.com>,
        Kai-Heng Feng <kai.heng.feng@canonical.com>,
        Abhishek Sahu <abhsahu@nvidia.com>,
        Thierry Reding <treding@nvidia.com>,
        Jonathan Hunter <jonathanh@nvidia.com>,
        Krishna Thota <kthota@nvidia.com>,
        Manikanta Maddireddy <mmaddireddy@nvidia.com>,
        Vidya Sagar <sagar.tv@gmail.com>, sagupta@nvidia.com,
        linux-kernel@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>
Subject: [PATCH 0/3] PCI/ASPM: Fix L1SS issues
Date:   Tue,  4 Oct 2022 21:58:06 -0500
Message-Id: <20221005025809.2247547-1-helgaas@kernel.org>
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From: Bjorn Helgaas <bhelgaas@google.com>

This is really late, but I think we have two significant issues with L1SS:

  1) pcie_aspm_cap_init() reads from the L1SS capability even when it
  doesn't exist, so it reads PCI_COMMAND and PCI_STATUS instead and treats
  those as an L1SS Capability value.

  2) encode_l12_threshold() encodes LTR_L1.2_THRESHOLD as smaller than
  requested, so ports may enter L1.2 when they should not.

These patches are intended to fix both issues.

Bjorn Helgaas (3):
  PCI/ASPM: Factor out L1 PM Substates configuration
  PCI/ASPM: Ignore L1 PM Substates if device lacks capability
  PCI/ASPM: Correct LTR_L1.2_THRESHOLD computation

 drivers/pci/pcie/aspm.c | 155 +++++++++++++++++++++++-----------------
 1 file changed, 90 insertions(+), 65 deletions(-)

-- 
2.25.1