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[2620:137:e000::1:20]) by mx.google.com with ESMTP id dm21-20020a170907949500b007429f0c69ccsi13532751ejc.579.2022.10.05.06.55.01; Wed, 05 Oct 2022 06:55:45 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=q++rgE56; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229990AbiJENhA (ORCPT + 99 others); Wed, 5 Oct 2022 09:37:00 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41844 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229823AbiJENg6 (ORCPT ); Wed, 5 Oct 2022 09:36:58 -0400 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 54E817AC29; Wed, 5 Oct 2022 06:36:57 -0700 (PDT) Received: from pps.filterd (m0288072.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 295C19SN004643; Wed, 5 Oct 2022 15:36:11 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=selector1; bh=UK8cv3Z7Vi2PsEmR/JMgWfQIL22uuQ2m+zMQDgVwZL8=; b=q++rgE560qAIcX3tKxmQL9thp4H9LEuQw15JlTa1QNfrYINjcyFqnSiIwV7lEECvMy4C ImKi7GmbxnFDy13PvHL7I4r2I6xwioQywnGjCXUpDBPXhqtdFzemarrhXE5mu/FDHXQ8 Yy8yrrYBkWdhARmZp5JoIGvHpuasUSsK5sK/mJ0merrQgczcCvXCM/X34DBwJH8/TLpY LPx8NcdVpb3/psFytYp9qSaLZ5ESLeZ2R5DYoz7+uTTPwifSJQXqDy5qmcXVHr79nc7a xe6q12yFdZkulv9N+8EbrjNNx6RuvXhKxzjm90tWsjBdFr5onLHepFgOwuneG6HVgwCb lg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3jxaym7tkq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 05 Oct 2022 15:36:11 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 12B0710002A; Wed, 5 Oct 2022 15:36:03 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id EC186229A9D; Wed, 5 Oct 2022 15:36:03 +0200 (CEST) Received: from localhost (10.75.127.118) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Wed, 5 Oct 2022 15:36:03 +0200 From: Olivier Moysan To: Alexandre Torgue , Andy Shevchenko , Fabrice Gasnier , Jonathan Cameron , Lars-Peter Clausen , Maxime Coquelin , , Olivier Moysan , Paul Cercueil , Sebastian Andrzej Siewior , Wan Jiabing , Yannick Brosseau CC: , , , Subject: [PATCH v2 0/8] iio: stm32-adc: add support of adc for stm32mp13 Date: Wed, 5 Oct 2022 15:31:12 +0200 Message-ID: <20221005133120.50483-1-olivier.moysan@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.75.127.118] X-ClientProxiedBy: GPXDAG2NODE4.st.com (10.75.127.68) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-05_03,2022-10-05_01,2022-06-22_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_LOW,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On STM32MP13 SoCs, each ADC peripheral has a single ADC block. These ADC peripherals, ADC1 and ADC2, are fully independent. The STM32MP131 SoC provides only ADC2, while other STM32MP13x SoCs provide both ADC1 and ADC2. The STM32MP13 ADC features and characteristics are slightly different from STM32MP15 ADC ones, requiring a specific support in the driver. This patchset enables the ADC peripheral on STM32MP135F-DK board. On STM32MP135F-DK board the ADC is connected to VDDA voltage provided by the PMIC LOD1 supply, which has to be enabled through SCMI regulator framework. This serie introduces a fixed regulator to allow ADC probing, while SCMI regulators support is not available. This does not ensure ADC regulator enabling however. Changes in v2: - Rework commit message length - Add missing spaces - Remove useless defines Olivier Moysan (8): iio: adc: stm32-adc: fix channel sampling time init dt-bindings: iio: adc: stm32-adc: add stm32mp13 compatibles iio: adc: stm32-adc: add stm32mp13 support iio: adc: stm32: manage min sampling time on all internal channels ARM: dts: stm32: add adc support to stm32mp13 ARM: dts: stm32: add adc pins muxing on stm32mp135f-dk ARM: dts: stm32: add dummy vdd_adc regulator on stm32mp135f-dk ARM: dts: stm32: add adc support on stm32mp135f-dk .../bindings/iio/adc/st,stm32-adc.yaml | 68 ++++- arch/arm/boot/dts/stm32mp13-pinctrl.dtsi | 7 + arch/arm/boot/dts/stm32mp131.dtsi | 43 +++ arch/arm/boot/dts/stm32mp133.dtsi | 31 +++ arch/arm/boot/dts/stm32mp135f-dk.dts | 34 +++ drivers/iio/adc/stm32-adc-core.c | 29 +- drivers/iio/adc/stm32-adc-core.h | 30 +++ drivers/iio/adc/stm32-adc.c | 249 +++++++++++++++--- 8 files changed, 444 insertions(+), 47 deletions(-) -- 2.25.1