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Wed, 5 Oct 2022 07:19:13 -0700 Message-ID: <3bf05883-e8dc-5e11-ed83-7f8f7b801737@quicinc.com> Date: Wed, 5 Oct 2022 07:19:11 -0700 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.6.2 Subject: Re: [PATCH 4/5] drm/msm/dpu1: Account for DSC's bits_per_pixel having 4 fractional bits Content-Language: en-US To: Marijn Suijten , , Rob Clark , Dmitry Baryshkov , Vinod Koul , , Douglas Anderson , Thomas Zimmermann , Jami Kettunen , Vladimir Lypak , , Konrad Dybcio , , Javier Martinez Canillas , David Airlie , Martin Botka , <~postmarketos/upstreaming@lists.sr.ht>, AngeloGioacchino Del Regno , Alex Deucher , Sean Paul , References: <20221001190807.358691-1-marijn.suijten@somainline.org> <20221001190807.358691-5-marijn.suijten@somainline.org> <7f7a5d78-e50f-b6af-bb3e-bbfbc7fa5f75@quicinc.com> <20221004221134.roino4u2waawgh6u@SoMainline.org> From: Abhinav Kumar In-Reply-To: <20221004221134.roino4u2waawgh6u@SoMainline.org> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: eawUBwmjs2ZNif2dVeoV7CCQHHci12b7 X-Proofpoint-ORIG-GUID: eawUBwmjs2ZNif2dVeoV7CCQHHci12b7 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.528,FMLib:17.11.122.1 definitions=2022-10-05_03,2022-10-05_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 impostorscore=0 lowpriorityscore=0 mlxlogscore=999 spamscore=0 mlxscore=0 phishscore=0 priorityscore=1501 suspectscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210050090 X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_LOW, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 10/4/2022 3:11 PM, Marijn Suijten wrote: > On 2022-10-04 10:03:07, Abhinav Kumar wrote: >> >> >> On 10/1/2022 12:08 PM, Marijn Suijten wrote: >>> According to the comment this DPU register contains the bits per pixel >>> as a 6.4 fractional value, conveniently matching the contents of >>> bits_per_pixel in struct drm_dsc_config which also uses 4 fractional >>> bits. However, the downstream source this implementation was >>> copy-pasted from has its bpp field stored _without_ fractional part. >>> >>> This makes the entire convoluted math obsolete as it is impossible to >>> pull those 4 fractional bits out of thin air, by somehow trying to reuse >>> the lowest 2 bits of a non-fractional bpp (lsb = bpp % 4??). >>> >>> The rest of the code merely attempts to keep the integer part a multiple >>> of 4, which is rendered useless thanks to data |= dsc->bits_per_pixel << >>> 12; already filling up those bits anyway (but not on downstream). >>> >>> Fixes: c110cfd1753e ("drm/msm/disp/dpu1: Add support for DSC") >>> Signed-off-by: Marijn Suijten >> >> Many of this bugs are because the downstream code from which this >> implementation was derived wasnt the latest perhaps? > > Perhaps, this code is "identical" to what I'm looking at in some > downstream 4.14 / 4.19, where the upstream struct for DSC either wasn't > there or wasn't used. We have to find and address these bugs one by one > to make our panels work, and this series gets one platform (sdm845) down > but has more work pending for others (sm8250 has my current focus). > > Or are you suggesting to "redo" the DSC integration work based on a > (much) newer display techpack (SDE driver)? There is no need to redo the DSC integration now. The code I am referring to is here : https://git.codelinaro.org/clo/la/platform/vendor/opensource/display-drivers/-/blob/DISPLAY.LA.2.0.r1-08000-WAIPIO.0/msm/sde_dsc_helper.c#L240 So with respect to the redundant math in patches 1/3/4/5 of this series, I dont see all the redundant math anymore in this calculation. This is what i meant by my comment. When DSC changes were pushed, they were indeed validated on sdm845 devices by Vinod so there was a certain level of confidence on those changes. At this point, we should just consider these as bug-fixes for upstream and keep going. A full redo is not required. At some point in the next couple of months, we plan to add DSC 1.2 support to MSM. We will check for any missing changes (if any after this series of yours) and push those as part of that. > >> Earlier, downstream had its own DSC struct maybe leading to this >> redundant math but now we have migrated over to use the upstream struct >> drm_dsc_config. > > Found the 3-year-old `disp: msm: use upstream dsc config data` commit > that makes this change. It carries a similar comment: > > /* integer bpp support only */ > > The superfluous math was howerver removed earlier, in: > > disp: msm: fix dsc parameters related to 10 bpc 10 bpp > > - Marijn > >> That being said, this patch LGTM >> Reviewed-by: Abhinav Kumar