Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp2144252rwb; Wed, 5 Oct 2022 09:36:07 -0700 (PDT) X-Google-Smtp-Source: AMsMyM5H3R9NZ62m3Bmax52t0IKWDqqbIO4fovWNGJ0vko3LGY4X2OU424zEfiwDxcTjCr1O6UFU X-Received: by 2002:a17:907:78a:b0:782:2223:a7cd with SMTP id xd10-20020a170907078a00b007822223a7cdmr376176ejb.532.1664987766732; Wed, 05 Oct 2022 09:36:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1664987766; cv=none; d=google.com; s=arc-20160816; b=zo18ckW4vr4ZOdpcGGNe9+/954pCg0bhBlGrBl0ir9k5rTXCoIqfHiOUVwzalM2T26 L68T0BpKK8MiHPQKQXbJGy54SeMVsGuE2ulgZuEZuqJbCKb6e21VKgpydNqDifYvC/iS paDwxCcBUc/WRgdqqXjVG1ADXi7WIGwNcvwL/uHpXykoE5jiUrIspP91JnjI91JZU0bY f91qI2+hUgNs7QCUd/WX4ixass964Spn4Lpkd0qF8VHzT4wmav8PMYlFBrfuJvnPdbGC AxZc6unVrMElxhL6WZqeLX43RzkWoy8xr95luG/Wmz0ZaVZ0QsxmIQ8T0b4hQfR1Yp4Z 7SJA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:in-reply-to:from :references:cc:to:content-language:subject:user-agent:mime-version :date:message-id:dkim-signature; bh=2w6hGoXebPoIegDYARuqnK05b0IdR9ODgaAioly0Ktc=; b=BWKOf2JyppjO/m72FlJf/gN3bJRU7Haoyxwta81A3PDUNSZzruefPNYjiY0Ho+lYBb Pg/cWCd9qo7SzLznUuABIfC58cVSaoPueoUpq1quf4wlsT1w7qhVWlVMwWGqDW1pZTPR wRd9SsAgHWGYvWmx3HQsn1g7qSHbpYpY80++IjWg5SuswG7JHTLD99hoixxOK8dD6kfk BOqO9vuluPJy4ULl2MKTgCxY7NHK1hVR2Qdi5v7FdzoCnTRgXzX5U493VNEOvEgAd4FV V9K7sJzWhidmu/ShoBcxctbH3Eu5q7STzmhNq0e72+S4PG84QeOOoy4vSbeqDpMlDsQn kmcw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=C9uRIYGi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id z11-20020a056402274b00b00449902443a0si17547368edd.23.2022.10.05.09.35.41; Wed, 05 Oct 2022 09:36:06 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=C9uRIYGi; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229913AbiJEQKR (ORCPT + 99 others); Wed, 5 Oct 2022 12:10:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45132 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229946AbiJEQKN (ORCPT ); Wed, 5 Oct 2022 12:10:13 -0400 Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A8F5020F70 for ; Wed, 5 Oct 2022 09:10:02 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id o7so18962703lfk.7 for ; Wed, 05 Oct 2022 09:10:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date; bh=2w6hGoXebPoIegDYARuqnK05b0IdR9ODgaAioly0Ktc=; b=C9uRIYGiPgNOdG/lUp4vq9QDJVOR4kpvX5aDKIQVnibFvliDEOJ4KnLvGOG1m9bJYd 0szSjcSBVI4G+rgLO1FFdzSLowVVZtXR960+drzUJqa9+vAwqZlbnxC+oFmReNECrr87 LoOeSge12tNaO03Wjm1SSAd3Oz7S0bKmIEPZC1UsP029lbz9Mgjl6nkwk34tyepS5+Ig h46D9gElGJJXVxVROr2DPet/isIlK9P4qbulcMZzW3U7TdrOWC96wjvhCPa3uBf6cgUp EP3NirBLBATvOdFwT92cyKhafVRoVvatZebvZAeOW8UzUGMWJUnn+mg1E9SKUE9cJHw2 CTDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date; bh=2w6hGoXebPoIegDYARuqnK05b0IdR9ODgaAioly0Ktc=; b=yL8CdjbV68ARD7L1hceL1IIaRQJDvycUFB0pAcMqo7R3Zub3vrVNl53+feTikoi9/p XMAQRyO8W59z4Cc0mvVnDt5Gc+2krxNVNkv2DA04pi83nbgyquMwU/zUn5yTLvBvxkcT W6e8AlqqwOh8INJZGv5aexM6o1rhj0m2rji/ZDkmJZJf/X895BGJYMak7eqWRC2qvqVE AtzbqureoEzhJnM0NAEtaU9DiY46wzUr0oe72jTK5ysn2rrC0rUABYOnCcIJI9RZhx8x iKfbeuxLWTLmLFt9oOPqY1z/1DwVGuNctti5nJEb7rO8e7je3RDjc//cO3wgetVePZH+ GxcQ== X-Gm-Message-State: ACrzQf38gO2A7z+uNLbRvb+Mw90mFDN1/zTJ+l/y/h4kg7Lxnfc7QjVg tAPTSiNowOPm9Xo58aJe9TA10g== X-Received: by 2002:a19:3849:0:b0:49e:e07:5e7c with SMTP id d9-20020a193849000000b0049e0e075e7cmr198445lfj.357.1664986200532; Wed, 05 Oct 2022 09:10:00 -0700 (PDT) Received: from [192.168.0.21] (78-11-189-27.static.ip.netia.com.pl. [78.11.189.27]) by smtp.gmail.com with ESMTPSA id y1-20020a2e4b01000000b0026bfadf87e3sm601871lja.20.2022.10.05.09.09.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 05 Oct 2022 09:10:00 -0700 (PDT) Message-ID: <28b4d9f9-f41a-deca-aa61-26fb65dcc873@linaro.org> Date: Wed, 5 Oct 2022 18:09:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.1 Subject: Re: [PATCH v3 net-next 12/14] dt-bindings: net: dsa: ocelot: add ocelot-ext documentation Content-Language: en-US To: Colin Foster Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, netdev@vger.kernel.org, Russell King , Linus Walleij , UNGLinuxDriver@microchip.com, Alexandre Belloni , Claudiu Manoil , Lee Jones , Krzysztof Kozlowski , Rob Herring , Paolo Abeni , Jakub Kicinski , Eric Dumazet , "David S. Miller" , Vladimir Oltean , Florian Fainelli , Vivien Didelot , Andrew Lunn References: <20220926002928.2744638-1-colin.foster@in-advantage.com> <20220926002928.2744638-13-colin.foster@in-advantage.com> <455e31be-dc87-39b3-c7fe-22384959c556@linaro.org> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 05/10/2022 17:44, Colin Foster wrote: > On Wed, Oct 05, 2022 at 10:03:04AM +0200, Krzysztof Kozlowski wrote: >> On 05/10/2022 02:08, Colin Foster wrote: >>> Hi Krzysztof, >>> >>> On Tue, Oct 04, 2022 at 01:19:33PM +0200, Krzysztof Kozlowski wrote: >>>> On 26/09/2022 02:29, Colin Foster wrote: >>>>> The ocelot-ext driver is another sub-device of the Ocelot / Felix driver >>>>> system, which currently supports the four internal copper phys. >>>>> >>>>> Signed-off-by: Colin Foster >>> ... >>>>> + # Ocelot-ext VSC7512 >>>>> + - | >>>>> + spi { >>>>> + soc@0 { >>>> >>>> soc in spi is a bit confusing. >>>> >>>> Does it even pass the tests? You have unit address but no reg. >>> >>> I omitted those from the documentation. Rob's bot is usually quick to >>> alert me when I forgot to run dt_binding_check and something fails >>> though. I'll double check, but I thought everything passed. >>> >>>> >>>>> + compatible = "mscc,vsc7512"; >>>> >>>> >>>>> + #address-cells = <1>; >>>>> + #size-cells = <1>; >>>>> + >>>>> + ethernet-switch@0 { >>>>> + compatible = "mscc,vsc7512-switch"; >>>>> + reg = <0 0>; >>>> >>>> 0 is the address on which soc bus? >>> >>> This one Vladimir brought up as well. The MIPS cousin of this chip >>> is the VSC7514. They have exactly (or almost exactly) the same hardware, >>> except the 7514 has an internal MIPS while the 7512 has an 8051. >>> >>> Both chips can be controlled externally via SPI or PCIe. This is adding >>> control for the chip via SPI. >>> >>> For the 7514, you can see there's an array of 20 register ranges that >>> all get mmap'd to 20 different regmaps. >>> >>> (Documentation/devicetree/bindings/net/mscc,vsc7514-switch.yaml) >>> >>> switch@1010000 { >>> compatible = "mscc,vsc7514-switch"; >>> reg = <0x1010000 0x10000>, >>> <0x1030000 0x10000>, >>> <0x1080000 0x100>, >>> <0x10e0000 0x10000>, >>> <0x11e0000 0x100>, >>> <0x11f0000 0x100>, >>> <0x1200000 0x100>, >>> <0x1210000 0x100>, >>> <0x1220000 0x100>, >>> <0x1230000 0x100>, >>> <0x1240000 0x100>, >>> <0x1250000 0x100>, >>> <0x1260000 0x100>, >>> <0x1270000 0x100>, >>> <0x1280000 0x100>, >>> <0x1800000 0x80000>, >>> <0x1880000 0x10000>, >>> <0x1040000 0x10000>, >>> <0x1050000 0x10000>, >>> <0x1060000 0x10000>, >>> <0x1a0 0x1c4>; >>> reg-names = "sys", "rew", "qs", "ptp", "port0", "port1", >>> "port2", "port3", "port4", "port5", "port6", >>> "port7", "port8", "port9", "port10", "qsys", >>> "ana", "s0", "s1", "s2", "fdma"; >>> >>> >>> The suggestion was to keep the device trees of the 7512 and 7514 as >>> similar as possible, so this will essentially become: >>> switch@71010000 { >>> compatible = "mscc,vsc7512-switch"; >>> reg = <0x71010000 0x10000>, >>> <0x71030000 0x10000>, >>> ... >> >> I don't understand how your answer relates to "reg=<0 0>;". How is it >> going to become 0x71010000 if there is no other reg/ranges set in parent >> nodes. The node has only one IO address, but you say the switch has 20 >> addresses... >> >> Are we talking about same hardware? > > Yes. The switch driver for both the VSC7512 and VSC7514 use up to ~20 regmaps > depending on what capabilities it is to have. In the 7514 they are all > memory-mapped from the device tree. While the 7512 does need these > regmaps, they are managed by the MFD, not the device tree. So there > isn't a _need_ for them to be here, since at the end of the day they're > ignored. > > The "reg=<0 0>;" was my attempt to indicate that they are ignored, but I > understand that isn't desired. So moving forward I'll add all the > regmaps back into the device tree. You need to describe the hardware. If hardware has IO address space, how does it matter that some driver needs or needs not something? You mentioned that address space is mapped to regmaps. Regmap is Linux specific implementation detail, so this does not answer at all about hardware. On the other hand, if your DTS design requires this is a child of something else and by itself it does not have address space, it would be understandable to skip unit address entirely... but so far it is still confusing, especially that you use arguments related to implementation to justify the DTS. Best regards, Krzysztof