Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp288057rwb; Wed, 5 Oct 2022 19:08:16 -0700 (PDT) X-Google-Smtp-Source: AMsMyM6jbQZUhu0oJjHtLdRU3KjveDPZJtgA75mEtK9MY6zXGSazSAcRzI2JYhS92MpVeSGnp5bm X-Received: by 2002:a17:907:a0e:b0:780:72bb:5ce4 with SMTP id bb14-20020a1709070a0e00b0078072bb5ce4mr2102950ejc.234.1665022096226; Wed, 05 Oct 2022 19:08:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665022096; cv=none; d=google.com; s=arc-20160816; b=QRBNTAt5UM/kZy/hCDa5MZCToVt73DOv/VUVpjM1QO179ZXfBlqAswjTv2UbPXfxsJ 57Z0/gSTRpsTXh9JeSaGjWm1gTWIRXCQ0QvqfJpE5izpbT6vetbnIB/B8AN4kjT+X5Ri xWvR4BOtmLOrBsBLnkbnaQA6mjswzVvZ2+YBmBf/hXCYyXbfaQAl2l3e3Q4wW/M/GozP xT0mD1AmsRJTfhCqWsbBv0+YGFOzVLkFETLu2CVjXgTGgTT870GWyAiAG8HEv7elvJpZ 0Taituzp40z5pGJsBqzZu1BwrHhigodLMxA6PzGoizSDlVp8nGJqdH3HxOFEvZRHvXH/ l3Sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :dkim-signature; bh=8Un5GM+Y2DQiQG7wSSCs+SeNLwQECJvJrcMB4DTU/6s=; b=Ru6jzF9bkrwdM2693kJ1HgxV2WvN8txO+U9GDauB53vMpLCfpKCKGCv2AVVyH9EzU+ yR2aHO0dN0GAwsZcDTq0gb0QG3t036G5ne5hrc0FjPaywF50Dp+RwSm/GDwW/venb2Bl GWfEXIdYhW/7vg802QHLkZP7fTNRG+mGj7YxRQ/bsnfR0pu/xKDwdslUay4qGqSg4XOJ U3Vm5+O+U8URwpRTIDoRvSmNtVRch18YzAIRfTFnnlJIq9hxcJLBAwRipnA6bdT358RD bP6rGSVBBEPsIwKEUJ17FeJ7KzSjVSKAn6ehGylAyAW9zDb3IMktwN0wYbepeRPnQRa8 IUGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=GlgVJY+H; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id b11-20020a056402278b00b004590401526fsi10576327ede.524.2022.10.05.19.07.51; Wed, 05 Oct 2022 19:08:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=GlgVJY+H; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229726AbiJFBoF (ORCPT + 99 others); Wed, 5 Oct 2022 21:44:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40588 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229508AbiJFBoD (ORCPT ); Wed, 5 Oct 2022 21:44:03 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B5B5C7F08F for ; Wed, 5 Oct 2022 18:44:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1665020642; x=1696556642; h=date:from:to:cc:subject:message-id:references: mime-version:in-reply-to; bh=CneSLw/fFoLPlSnTLl0TJU6+uM4dil9z5AcF2EVouV8=; b=GlgVJY+H7BthealhunNNbqrgfg0nKOGCxPdh8ml8X5kX8i387Z2AOqsE UIBeoo2d8lDgp+BZrSgf1s7q23+KyQbtsM6M2LU2NqUykuhv+4i7ctooJ oN7JwUmL+PrfGJm949UQH/IvP2WP/6VatiZrmwWfTqUwgZCafG+hqhzsw LIVtEawGgEfeYhXqCRJPZJGnvjl9gU/eQ1O9ubvuRcAydbLH5QtaeZNLS ZjEPKjVMaY3T7OCRvuXRMXz+iZp0PnrS/vq7Hq+VrMEf/10fOu19QYtLs LT2Blo8XdVuheFXESd7JJDibLkcpqQJJ6Mymy320CG3ycb2Kcxsba9k06 w==; X-IronPort-AV: E=McAfee;i="6500,9779,10491"; a="367445634" X-IronPort-AV: E=Sophos;i="5.95,162,1661842800"; d="scan'208";a="367445634" Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 05 Oct 2022 18:44:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10491"; a="626823519" X-IronPort-AV: E=Sophos;i="5.95,162,1661842800"; d="scan'208";a="626823519" Received: from ranerica-svr.sc.intel.com ([172.25.110.23]) by fmsmga007.fm.intel.com with ESMTP; 05 Oct 2022 18:44:01 -0700 Date: Wed, 5 Oct 2022 18:50:30 -0700 From: Ricardo Neri To: Peter Zijlstra Cc: Juri Lelli , Vincent Guittot , Ricardo Neri , "Ravi V. Shankar" , Ben Segall , Daniel Bristot de Oliveira , Dietmar Eggemann , Len Brown , Mel Gorman , "Rafael J. Wysocki" , Srinivas Pandruvada , Steven Rostedt , Tim Chen , Valentin Schneider , x86@kernel.org, linux-kernel@vger.kernel.org, "Tim C . Chen" Subject: Re: [RFC PATCH 17/23] thermal: intel: hfi: Enable the Intel Thread Director Message-ID: <20221006015030.GC29251@ranerica-svr.sc.intel.com> References: <20220909231205.14009-1-ricardo.neri-calderon@linux.intel.com> <20220909231205.14009-18-ricardo.neri-calderon@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-Spam-Status: No, score=-4.3 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_EF,RCVD_IN_DNSWL_MED,SPF_HELO_NONE, SPF_NONE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 27, 2022 at 02:00:39PM +0200, Peter Zijlstra wrote: > On Fri, Sep 09, 2022 at 04:11:59PM -0700, Ricardo Neri wrote: > > > +config INTEL_THREAD_DIRECTOR > > + bool "Intel Thread Director" > > + depends on INTEL_HFI_THERMAL > > + depends on SMP > > + select SCHED_TASK_CLASSES > > + help > > + Select this option to enable the Intel Thread Director. If selected, > > + hardware classifies tasks based on the type of instructions they > > + execute. It also provides performance capabilities for each class of > > + task. On hybrid processors, the scheduler uses this data to place > > + tasks of classes of higher performance on higher-performnance CPUs. > > Do we really need yet another CONFIG symbol for all this!? AFAICT this > Thread Director crud simply extends the HFI table and doesn't actually > carry that much code with it. > > Best to always have it on when HFI is on, no? I decided to add CONFIG_INTEL_THREAD_DIRECTOR mainly to select CONFIG_IPC_ CLASS and have the needed members of task_struct only when needed. Legacy, classless, HFI can work with the Thread Director part on some processors (e.g., Sapphire Rapids or, FWIW, Lakefield). I could get rid of CONFIG_INTEL_THREAD_DIRECTOR and instead wrap the Thread Director code in an #ifdef(CONFIG_IPC_CLASS) block instead. Thanks and BR, Ricardo