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[2620:137:e000::1:20]) by mx.google.com with ESMTP id nb37-20020a1709071ca500b0077fd6028710si15984860ejc.670.2022.10.05.20.06.28; Wed, 05 Oct 2022 20:07:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230000AbiJFCGS (ORCPT + 99 others); Wed, 5 Oct 2022 22:06:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40428 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229701AbiJFCGL (ORCPT ); Wed, 5 Oct 2022 22:06:11 -0400 Received: from ironport.ite.com.tw (60-251-196-230.hinet-ip.hinet.net [60.251.196.230]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 82AA3868B5 for ; Wed, 5 Oct 2022 19:06:10 -0700 (PDT) Received: from unknown (HELO mse.ite.com.tw) ([192.168.35.30]) by ironport.ite.com.tw with ESMTP; 06 Oct 2022 10:05:04 +0800 Received: from CSBMAIL1.internal.ite.com.tw (CSBMAIL1.internal.ite.com.tw [192.168.65.58]) by mse.ite.com.tw with ESMTP id 29624xiQ058648; Thu, 6 Oct 2022 10:04:59 +0800 (GMT-8) (envelope-from allen.chen@ite.com.tw) Received: from VirtualBox.internal.ite.com.tw (192.168.70.46) by CSBMAIL1.internal.ite.com.tw (192.168.65.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.14; Thu, 6 Oct 2022 10:04:59 +0800 From: allen CC: Allen Chen , Jau-Chih Tseng , Kenneth Hung , Hermes Wu , Pin-yen Lin , Andrzej Hajda , Neil Armstrong , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , David Airlie , Daniel Vetter , "open list:DRM DRIVERS" , open list Subject: [PATCH v3 2/2] drm/bridge: add it6505 driver to read data-lanes and max-pixel-clock-mhz from dt Date: Thu, 6 Oct 2022 10:04:44 +0800 Message-ID: <20221006020444.15823-3-allen.chen@ite.com.tw> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221006020444.15823-1-allen.chen@ite.com.tw> References: <20221006020444.15823-1-allen.chen@ite.com.tw> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [192.168.70.46] X-ClientProxiedBy: CSBMAIL1.internal.ite.com.tw (192.168.65.58) To CSBMAIL1.internal.ite.com.tw (192.168.65.58) X-TM-SNTS-SMTP: 5444D5DECE8CEE89F56CBFAA8093601BD179EFDA3A669DAFD22A0FFAC3BDDA5E2002:8 X-MAIL: mse.ite.com.tw 29624xiQ058648 X-Spam-Status: No, score=-0.9 required=5.0 tests=BAYES_00,PDS_RDNS_DYNAMIC_FP, RDNS_DYNAMIC,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: allen chen Add driver to read data-lanes and max-pixel-clock-mhz from dt property to restrict output bandwidth. Signed-off-by: Allen chen Signed-off-by: Pin-yen Lin --- drivers/gpu/drm/bridge/ite-it6505.c | 36 ++++++++++++++++++++++++++--- 1 file changed, 33 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/bridge/ite-it6505.c b/drivers/gpu/drm/bridge/ite-it6505.c index 2767b70fa2cb..eca9a2c296a8 100644 --- a/drivers/gpu/drm/bridge/ite-it6505.c +++ b/drivers/gpu/drm/bridge/ite-it6505.c @@ -436,6 +436,8 @@ struct it6505 { bool powered; bool hpd_state; u32 afe_setting; + u32 max_dpi_pixel_clock; + u32 max_lane_count; enum hdcp_state hdcp_status; struct delayed_work hdcp_work; struct work_struct hdcp_wait_ksv_list; @@ -1475,7 +1477,8 @@ static void it6505_parse_link_capabilities(struct it6505 *it6505) it6505->lane_count = link->num_lanes; DRM_DEV_DEBUG_DRIVER(dev, "Sink support %d lanes training", it6505->lane_count); - it6505->lane_count = min_t(int, it6505->lane_count, MAX_LANE_COUNT); + it6505->lane_count = min_t(int, it6505->lane_count, + it6505->max_lane_count); it6505->branch_device = drm_dp_is_branch(it6505->dpcd); DRM_DEV_DEBUG_DRIVER(dev, "Sink %sbranch device", @@ -2901,7 +2904,7 @@ it6505_bridge_mode_valid(struct drm_bridge *bridge, if (mode->flags & DRM_MODE_FLAG_INTERLACE) return MODE_NO_INTERLACE; - if (mode->clock > DPI_PIXEL_CLK_MAX) + if (mode->clock > it6505->max_dpi_pixel_clock) return MODE_CLOCK_HIGH; it6505->video_info.clock = mode->clock; @@ -3066,6 +3069,8 @@ static void it6505_parse_dt(struct it6505 *it6505) { struct device *dev = &it6505->client->dev; u32 *afe_setting = &it6505->afe_setting; + u32 *max_lane_count = &it6505->max_lane_count; + u32 *max_dpi_pixel_clock = &it6505->max_dpi_pixel_clock; it6505->lane_swap_disabled = device_property_read_bool(dev, "no-laneswap"); @@ -3081,7 +3086,32 @@ static void it6505_parse_dt(struct it6505 *it6505) } else { *afe_setting = 0; } - DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %d", *afe_setting); + + if (device_property_read_u32(dev, "ite,dp-output-data-lane-count", + max_lane_count) == 0) { + if (*max_lane_count > 4 || *max_lane_count == 3) { + dev_err(dev, "max lane count error, use default"); + *max_lane_count = MAX_LANE_COUNT; + } + } else { + *max_lane_count = MAX_LANE_COUNT; + } + + if (device_property_read_u32(dev, "ite,dp-output-max-pixel-clock-mhz", + max_dpi_pixel_clock) == 0) { + *max_dpi_pixel_clock *= 1000; + if (*max_dpi_pixel_clock > 297000) { + dev_err(dev, "max pixel clock error, use default"); + *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX; + } + } else { + *max_dpi_pixel_clock = DPI_PIXEL_CLK_MAX; + } + + DRM_DEV_DEBUG_DRIVER(dev, "using afe_setting: %u, max_lane_count: %u", + it6505->afe_setting, it6505->max_lane_count); + DRM_DEV_DEBUG_DRIVER(dev, "using max_dpi_pixel_clock: %u kHz", + it6505->max_dpi_pixel_clock); } static ssize_t receive_timing_debugfs_show(struct file *file, char __user *buf, -- 2.25.1