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Message-ID: <7bcb9ef1-6b56-2f5f-3ac9-acc9ed9370df@linaro.org>
Date:   Thu, 6 Oct 2022 16:11:39 +0200
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Subject: Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add
 pinctrl names for SPI signal states
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To:     Amjad Ouled-Ameur <aouledameur@baylibre.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Neil Armstrong <neil.armstrong@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
        Kevin Hilman <khilman@baylibre.com>,
        Jerome Brunet <jbrunet@baylibre.com>,
        Mark Brown <broonie@kernel.org>
Cc:     Da Xue <da@libre.computer>, linux-kernel@vger.kernel.org,
        linux-spi@vger.kernel.org, linux-amlogic@lists.infradead.org,
        devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
References: <20221004-up-aml-fix-spi-v2-0-3e8ae91a1925@baylibre.com>
 <20221004-up-aml-fix-spi-v2-1-3e8ae91a1925@baylibre.com>
 <d2ce98d7-1025-9c6e-e207-00e91942077a@linaro.org>
 <fb2706e3-f758-a0b0-d595-75ef362a853e@baylibre.com>
From:   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
In-Reply-To: <fb2706e3-f758-a0b0-d595-75ef362a853e@baylibre.com>
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On 06/10/2022 12:57, Amjad Ouled-Ameur wrote:
> Hi Krzysztof,
> 
> Thank you for the review.
> 
> On 10/5/22 10:14, Krzysztof Kozlowski wrote:
>> On 04/10/2022 13:10, Amjad Ouled-Ameur wrote:
>>> SPI pins of the SPICC Controller in Meson-GX needs to be controlled by
>>> pin biais when idle. Therefore define three pinctrl names:
>>> - default: SPI pins are controlled by spi function.
>>> - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled
>>> by spi function.
>>> - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled
>>> by spi function.
>>>
>>> Reported-by: Da Xue <da@libre.computer>
>>> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
>>> Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com>
>>> ---
>>>   .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml   | 15 +++++++++++++++
>>>   1 file changed, 15 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>> index 0c10f7678178..53013e27f507 100644
>>> --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>> +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml
>>> @@ -43,6 +43,14 @@ properties:
>>>       minItems: 1
>>>       maxItems: 2
>>>   
>>> +  pinctrl-0:
>>> +    minItems: 1
>> maxItems?
>>
> Will fill it in next version.
>>> +
>>> +  pinctrl-1:
>>> +    maxItems: 1
>>> +
>>> +  pinctrl-names: true
>> Why do you need all these in the bindings?
> 
> SPI clock bias needs to change at runtime depending on SPI mode, here is an example of
> 
> how this is supposed to be used ("spi_idle_low_pins" and "spi_idle_low_pins" are defined
> 
> in the second patch of this series):

I know what it the point in general of pinctrl configuration... But the
question is why do you need to specify them in the bindings? Core
handles that. IOW, do you require them and missing/incomplete pinctrl
should be reported?

Best regards,
Krzysztof