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Thu, 6 Oct 2022 19:04:12 -0400 (EDT) Date: Thu, 6 Oct 2022 18:04:11 -0500 From: Patrick Williams To: Michael Walle Cc: Delphine CC Chiu , ~sircmpwn/email-test-drive@lists.sr.ht, garnermic@fb.com, Tudor Ambarus , Pratyush Yadav , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Potin Lai Subject: Re: [PATCH] mtd: spi-nor: winbond: add support for w25q01jv-im Message-ID: References: <20221006070841.2106194-1-Delphine_CC_Chiu@Wiwynn.com> <0dde4fa6ddeefa23314dbdcd1dd1b28b@walle.cc> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="QFYV+iri/JDIrPel" Content-Disposition: inline In-Reply-To: X-Spam-Status: No, score=-2.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FROM_SUSPICIOUS_NTLD, RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_HELO_PASS, SPF_PASS,T_PDS_OTHER_BAD_TLD autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --QFYV+iri/JDIrPel Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Oct 06, 2022 at 03:40:48PM -0500, Patrick Williams wrote: > On Thu, Oct 06, 2022 at 01:52:33PM +0200, Michael Walle wrote: > > Hi, > >=20 > > Am 2022-10-06 09:08, schrieb Delphine CC Chiu: > > > Add support for winbond w25q01jv-im chip. > > >=20 > > > Signed-off-by: Delphine CC Chiu > > > --- > > > drivers/mtd/spi-nor/winbond.c | 3 +++ > > > 1 file changed, 3 insertions(+) > > >=20 > > > diff --git a/drivers/mtd/spi-nor/winbond.c=20 > > > b/drivers/mtd/spi-nor/winbond.c > > > index ffaa24055259..2b02b05ceb0a 100644 > > > --- a/drivers/mtd/spi-nor/winbond.c > > > +++ b/drivers/mtd/spi-nor/winbond.c > > > @@ -139,6 +139,9 @@ static const struct flash_info winbond_nor_parts[= ]=20 > > > =3D { > > > { "w25q512jvq", INFO(0xef4020, 0, 64 * 1024, 1024) > > > NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | > > > SPI_NOR_QUAD_READ) }, > > > + { "w25q01jv-im", INFO(0xef7021, 0, 64 * 1024, 2048) > >=20 > > The name should be w25q01jvm. > >=20 > > > + NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | > > > + SPI_NOR_QUAD_READ) }, > >=20 > > That flash should support SFDP, so please try the following: > > + { "w25q01jvm", INFO(0xef7021, 0, 0, 0) PARSE_SFDP }, >=20 > It seems like QEMU doesn't support SFDP yet. Is using PARSE_SFDP a hard > requirement or can we delay until the QEMU support can be written? It turns out that there is some tentative support in QEMU for giving SFDP information now. I've sent a patch building on top of that for the w25q01jvq chip and updated Potin's patch-set to v4 that I mentioned elsewhere in this thread. It looks like the w25q01jvq I pointed to in Potin's patch-set and the w25q01jvm being proposed here are slightly different chips. --=20 Patrick Williams --QFYV+iri/JDIrPel Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEBGD9ii4LE9cNbqJBqwNHzC0AwRkFAmM/XukACgkQqwNHzC0A wRkoQA//Z5uGIe+1YPNJV2xianP3UkgF0nc4Npy9LdsWZ52m+yuoGTBgLGvPcC7Y p2pdkLeyMCdRXO5RG52QXf7r7GYsmD/qUgw/1ZCjfC591qN4Fkt6fuO87pa6CFU3 ZZ2T6Ai/kWlbNkvEoMu6p9qx5W90g/IqzrFQn5AQ0M/vq4o0PPkVcUj8KsiM/Vrl k7FO5zoiy1yED7Q/BdafkvNhiMK2eu0ytKc9c8maHXEi/G1V64xmC9nN3Oe7fofh QBr810X1w6OC01zB4gD3i8l935hllGMomggX2CDFmKsBq9Oo6iwCLyekm9WwgRnP XuZLHMe8ohkGo+BdjLsfFKq4Mfw4WrV83DqfRiv1oiwdDZrBxVTYE2dlgk307/nA VvtWxedXDYzYekc9AdZxv6kSIKbHEOHzmPJgLgCgipXJfs22q540WOd7171vcWkp xR+Qx/dntR+8xXe5aIn08g4xfHVx6c2lEykHIo4hk4pbqp8JxyuXYo1mpNLvmhRK Q0DLIoiITxgNWvgAB9Ek8xT+VTD0JCNMdUF+qAMFCs/u9NOASM6ZuRqMLfR6i3av y7OmCk5Kj68T0F1jxgq40szm+P0M/c8qb2nL3QAjIptZ36GqEaZOdj7Y4jPUCoQ3 KqHPhpz4BJE+hpKpX3itNZf7uBc12yd4+Estzx68U1pMZwcWrnA= =k89/ -----END PGP SIGNATURE----- --QFYV+iri/JDIrPel--