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[2620:137:e000::1:20]) by mx.google.com with ESMTP id k2-20020a056402048200b00448ce617058si765734edv.463.2022.10.06.21.07.20; Thu, 06 Oct 2022 21:07:52 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@mediatek.com header.s=dk header.b=WUX2dzns; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229638AbiJGDSK (ORCPT + 99 others); Thu, 6 Oct 2022 23:18:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46750 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229517AbiJGDRw (ORCPT ); Thu, 6 Oct 2022 23:17:52 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 36E899F75D; Thu, 6 Oct 2022 20:17:45 -0700 (PDT) X-UUID: 2abc1011dbd54f95a3931dc8942129b4-20221007 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=XEZo6MeD7iZ0GlWlMoZRRlpTW9x8DYLfvSsVWsMRYz8=; b=WUX2dznsKOPm30Q4Ms8tjlQXU22y3MNqlIifVSfqlZmmbd4xfB00tI5gEE+nXD7f0eWkEgRVydeMMRbFFghqRhEddoulcveP5SRxDI2aqcrqkAwH2h5TMRu7U0sv4GlLQ4lvmE4XgjE6T2NIm7SXGo84GQdgnijHO75K6IBPMak=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:5721fc2c-48a3-46ff-9dc1-5fe1771057c0,IP:0,U RL:0,TC:0,Content:-5,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION :release,TS:-5 X-CID-META: VersionHash:39a5ff1,CLOUDID:9cf92be1-2948-402a-a6e4-b5d31fe11eb7,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 2abc1011dbd54f95a3931dc8942129b4-20221007 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 413872370; Fri, 07 Oct 2022 11:17:39 +0800 Received: from mtkmbs11n2.mediatek.inc (172.21.101.187) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.792.15; Fri, 7 Oct 2022 11:17:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs11n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.792.15 via Frontend Transport; Fri, 7 Oct 2022 11:17:38 +0800 From: Moudy Ho To: Mauro Carvalho Chehab , Matthias Brugger , Hans Verkuil CC: Chun-Kuang Hu , , , , , Moudy Ho Subject: [PATCH v1 0/6] Add support for multiple chips Date: Fri, 7 Oct 2022 11:17:31 +0800 Message-ID: <20221007031737.5125-1-moudy.ho@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N X-Spam-Status: No, score=-1.6 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,RCVD_IN_MSPIKE_H2,SPF_HELO_PASS,SPF_PASS,UNPARSEABLE_RELAY, URIBL_CSS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, This series are based on following series: MDP3: [1] https://patchwork.kernel.org/project/linux-mediatek/list/?series=682204 [2] https://patchwork.kernel.org/project/linux-mediatek/list/?series=682891 [3] https://patchwork.kernel.org/project/linux-mediatek/list/?series=683526 To support multiple chips, a chip configuration header file needs to be created and the relevant information split and moved into it. Moudy Ho (6): media: platform: mtk-mdp3: add chip configuration header file media: platform: mtk-mdp3: chip config split about component settings media: platform: mtk-mdp3: chip config split about subcomponents media: platform: mtk-mdp3: chip config split about color format media: platform: mtk-mdp3: chip config split about resolution limitations media: platform: mtk-mdp3: chip config split about pipe info .../media/platform/mediatek/mdp3/mt8183_mdp.h | 409 ++++++++++++++++++ .../platform/mediatek/mdp3/mtk-mdp3-cmdq.c | 42 +- .../platform/mediatek/mdp3/mtk-mdp3-comp.c | 160 ++++--- .../platform/mediatek/mdp3/mtk-mdp3-comp.h | 24 +- .../platform/mediatek/mdp3/mtk-mdp3-core.c | 48 +- .../platform/mediatek/mdp3/mtk-mdp3-core.h | 13 + .../platform/mediatek/mdp3/mtk-mdp3-m2m.c | 10 +- .../platform/mediatek/mdp3/mtk-mdp3-regs.c | 283 +----------- .../platform/mediatek/mdp3/mtk-mdp3-regs.h | 7 +- 9 files changed, 603 insertions(+), 393 deletions(-) create mode 100644 drivers/media/platform/mediatek/mdp3/mt8183_mdp.h -- 2.18.0