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[82.66.176.246]) by smtp.gmail.com with ESMTPSA id f11-20020a05600c154b00b003a3442f1229sm8185520wmg.29.2022.10.07.00.45.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 07 Oct 2022 00:45:10 -0700 (PDT) Message-ID: <96160129-e9a0-ec0f-20d9-c92d1487eac6@linaro.org> Date: Fri, 7 Oct 2022 09:45:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 From: neil.armstrong@linaro.org Reply-To: neil.armstrong@linaro.org Subject: Re: [PATCH v2 1/2] spi: dt-bindings: amlogic, meson-gx-spicc: Add pinctrl names for SPI signal states Content-Language: en-US To: Krzysztof Kozlowski , Amjad Ouled-Ameur , Krzysztof Kozlowski , Rob Herring , Martin Blumenstingl , Kevin Hilman , Jerome Brunet , Mark Brown Cc: Da Xue , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org References: <20221004-up-aml-fix-spi-v2-0-3e8ae91a1925@baylibre.com> <20221004-up-aml-fix-spi-v2-1-3e8ae91a1925@baylibre.com> <7bcb9ef1-6b56-2f5f-3ac9-acc9ed9370df@linaro.org> <2c22e3b9-3da4-78c4-e068-78b84e24b2c3@linaro.org> <83649505-d8eb-b0b5-da9d-4536f58a7daa@linaro.org> Organization: Linaro Developer Services In-Reply-To: <83649505-d8eb-b0b5-da9d-4536f58a7daa@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Spam-Status: No, score=-3.5 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,NICE_REPLY_A,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 07/10/2022 09:04, Krzysztof Kozlowski wrote: > On 06/10/2022 17:48, Neil Armstrong wrote: >> On 06/10/2022 16:11, Krzysztof Kozlowski wrote: >>> On 06/10/2022 12:57, Amjad Ouled-Ameur wrote: >>>> Hi Krzysztof, >>>> >>>> Thank you for the review. >>>> >>>> On 10/5/22 10:14, Krzysztof Kozlowski wrote: >>>>> On 04/10/2022 13:10, Amjad Ouled-Ameur wrote: >>>>>> SPI pins of the SPICC Controller in Meson-GX needs to be controlled by >>>>>> pin biais when idle. Therefore define three pinctrl names: >>>>>> - default: SPI pins are controlled by spi function. >>>>>> - idle-high: SCLK pin is pulled-up, but MOSI/MISO are still controlled >>>>>> by spi function. >>>>>> - idle-low: SCLK pin is pulled-down, but MOSI/MISO are still controlled >>>>>> by spi function. >>>>>> >>>>>> Reported-by: Da Xue >>>>>> Signed-off-by: Neil Armstrong >>>>>> Signed-off-by: Amjad Ouled-Ameur >>>>>> --- >>>>>> .../devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml | 15 +++++++++++++++ >>>>>> 1 file changed, 15 insertions(+) >>>>>> >>>>>> diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml >>>>>> index 0c10f7678178..53013e27f507 100644 >>>>>> --- a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml >>>>>> +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml >>>>>> @@ -43,6 +43,14 @@ properties: >>>>>> minItems: 1 >>>>>> maxItems: 2 >>>>>> >>>>>> + pinctrl-0: >>>>>> + minItems: 1 >>>>> maxItems? >>>>> >>>> Will fill it in next version. >>>>>> + >>>>>> + pinctrl-1: >>>>>> + maxItems: 1 >>>>>> + >>>>>> + pinctrl-names: true >>>>> Why do you need all these in the bindings? >>>> >>>> SPI clock bias needs to change at runtime depending on SPI mode, here is an example of >>>> >>>> how this is supposed to be used ("spi_idle_low_pins" and "spi_idle_low_pins" are defined >>>> >>>> in the second patch of this series): >>> >>> I know what it the point in general of pinctrl configuration... But the >>> question is why do you need to specify them in the bindings? Core >>> handles that. IOW, do you require them and missing/incomplete pinctrl >>> should be reported? >> >> Looking at other bindings, when specific pinctrl state names were requires, they were >> documented. > > Yes, the required and/or necessary entries were added to few other > bindings. Since Amjad did not make them required, why adding them? So I > repeat the question for the third time - why do you need to add them to > the bindings? > >> There's some bindings with pinctrl-names for specific states like rockchip/rockchip,dw-hdmi.yaml, >> mediatek/mediatek,dpi.yaml, mmc/mtk-sd.yaml or mmc/fsl-imx-esdhc.yaml > > And? Just because someone did something is not itself an argument. They > might have their reasons. If their reasons are applicable here, please > state them. OK, I thought the reason was explicit, we find it worth documenting those optional pinctrl states for when the spi lines are in idle state. If it's not an enough good reason, we'll drop this patch. > > Best regards, > Krzysztof > Thanks, Neil