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[2620:137:e000::1:20]) by mx.google.com with ESMTP id z12-20020a170902708c00b0017a007f3d3esi5340321plk.421.2022.10.08.07.14.47; Sat, 08 Oct 2022 07:14:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=FvItbNUf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229575AbiJHNGM (ORCPT + 99 others); Sat, 8 Oct 2022 09:06:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44708 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229453AbiJHNGK (ORCPT ); Sat, 8 Oct 2022 09:06:10 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B3671F616 for ; Sat, 8 Oct 2022 06:06:07 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id D7876B80930 for ; Sat, 8 Oct 2022 13:06:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 37826C433C1; Sat, 8 Oct 2022 13:06:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665234364; bh=H7rISWDXkngUvPpbP1IItKQyMeTVxkOe5m2lSjAHcB8=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=FvItbNUfDAnJau58e4XAMWhwkdAVlsyW/WK+ET2tFNXymzragVktCk1hDylCAFjPp MW/ZTRBbu/+2aHKEPX9PxVUQD6Sv1MlocqLbKQlUhwd3rgzWBlcA7aKv/AUsAifYao Pl7cCA3e+hMKdpulqF7EvdpQgHDd4GeAajdzrCAGMFd6tINY4mzp6EpkE57v000/SZ 6kOCi3qSu6nN3Nu8DvuWap62ukQCvpGhGy3mYbnOROoAq6VbdgkS9nY4sHtd6gB4JG Vg9SWCChICqSsoN3f4zS3uv4AuwP8A5pphGdM5TtEH+gCrlzUAH7sqWL4/qyk5MUSU J6pywYoDpv2Bg== Date: Sat, 8 Oct 2022 14:06:00 +0100 From: Conor Dooley To: Jisheng Zhang Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/8] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Message-ID: References: <20221006070818.3616-1-jszhang@kernel.org> <20221006070818.3616-2-jszhang@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20221006070818.3616-2-jszhang@kernel.org> X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 06, 2022 at 03:08:11PM +0800, Jisheng Zhang wrote: > It's a bit wired to call riscv_noncoherent_supported() once when > insmod a module. Move the calling out of feature patch func. > > Signed-off-by: Jisheng Zhang > --- > arch/riscv/kernel/cpufeature.c | 7 +------ > arch/riscv/kernel/setup.c | 4 ++++ > 2 files changed, 5 insertions(+), 6 deletions(-) > > diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c > index 3b5583db9d80..03611b3ef45e 100644 > --- a/arch/riscv/kernel/cpufeature.c > +++ b/arch/riscv/kernel/cpufeature.c > @@ -272,12 +272,7 @@ static bool __init_or_module cpufeature_probe_zicbom(unsigned int stage) > case RISCV_ALTERNATIVES_EARLY_BOOT: > return false; > default: > - if (riscv_isa_extension_available(NULL, ZICBOM)) { > - riscv_noncoherent_supported(); > - return true; > - } else { > - return false; > - } > + return riscv_isa_extension_available(NULL, ZICBOM); > } > #endif > > diff --git a/arch/riscv/kernel/setup.c b/arch/riscv/kernel/setup.c > index 2dfc463b86bb..1a055c3f5d9d 100644 > --- a/arch/riscv/kernel/setup.c > +++ b/arch/riscv/kernel/setup.c > @@ -299,6 +299,10 @@ void __init setup_arch(char **cmdline_p) > riscv_init_cbom_blocksize(); > riscv_fill_hwcap(); > apply_boot_alternatives(); > +#ifdef CONFIG_RISCV_DMA_NONCOHERENT > + if (riscv_isa_extension_available(NULL, ZICBOM)) > + riscv_noncoherent_supported(); > +#endif I have a personal bias against ifdefs where possible, maybe @Heiko remembers why riscv_noncoherent_supported() was not defined as something like `void riscv_noncoherent_support(void){}` for when that CONFIG is not enabled? If it was this could become a an IS_ENABLED & we wouldn't have to be so careful about wrapping it's usage in ifdefs. Your change in isolation makes sense to me though, so: Reviewed-by: Conor Dooley Thanks, Conor. > } > > static int __init topology_init(void) > -- > 2.37.2 >