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From:   Colin Foster <colin.foster@in-advantage.com>
To:     netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org
Cc:     Russell King <linux@armlinux.org.uk>, UNGLinuxDriver@microchip.com,
        Alexandre Belloni <alexandre.belloni@bootlin.com>,
        Claudiu Manoil <claudiu.manoil@nxp.com>,
        Paolo Abeni <pabeni@redhat.com>,
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        Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
        Rob Herring <robh+dt@kernel.org>, Lee Jones <lee@kernel.org>
Subject: [RFC v4 net-next 15/17] dt-bindings: net: dsa: ocelot: add ocelot-ext documentation
Date:   Sat,  8 Oct 2022 11:51:50 -0700
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The ocelot-ext driver is another sub-device of the Ocelot / Felix driver
system. It requires a register array similar to the VSC7514 and has
different ports layout than existing devices.

Signed-off-by: Colin Foster <colin.foster@in-advantage.com>
---

v4
    * Add documentation for all supported modes (qsgmii / sgmii)
    * /s/7412/7512
    * Changes to match the VSC7514 device tree, including:
      - Replace ethernet-switch@0 to ethernet-switch@71010000
      - Add all reg / reg-names entries
    * Add example entries for ports 4-7, which requires phy-ocelot-serdes.h
    * Add the last sentence to the commit description, which replaces
      the phrase "which currently supports the four internal copper
      phys"
    * Remove "spi {" node from the documentation
    * Remove "cpu" label from port 0
    * Add "soc { reg = <0 0>;" to fix dt_binding_check warning

v3
    * Remove "currently supported" verbage
        The Seville and Felix 9959 all list their supported modes following
        the sentence "The following PHY interface types are supported".
        During V2, I had used "currently supported" to suggest more interface
        modes are around the corner, though this had raised questions.

        The suggestion was to drop the entire sentence. I did leave the
        modified sentence there because it exactly matches the other two
        supported products.

v2
    * New patch

---
 .../bindings/net/dsa/mscc,ocelot.yaml         | 112 ++++++++++++++++++
 1 file changed, 112 insertions(+)

diff --git a/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml b/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml
index 8d93ed9c172c..8a73fc9dbcaa 100644
--- a/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/mscc,ocelot.yaml
@@ -54,9 +54,24 @@ description: |
       - phy-mode = "1000base-x": on ports 0, 1, 2, 3
       - phy-mode = "2500base-x": on ports 0, 1, 2, 3
 
+  VSC7512 (Ocelot-Ext):
+
+    The Ocelot family consists of four devices, the VSC7511, VSC7512, VSC7513,
+    and the VSC7514. The VSC7513 and VSC7514 both have an internal MIPS
+    processor that natively support Linux. Additionally, all four devices
+    support control over external interfaces, SPI and PCIe. The Ocelot-Ext
+    driver is for the external control portion.
+
+    The following PHY interface types are supported:
+
+      - phy-mode = "internal": on ports 0, 1, 2, 3
+      - phy-mode = "sgmii": on ports 4, 5, 7, 8, 9, 10
+      - phy-mode = "qsgmii": on ports 4, 5, 6, 7, 8, 10
+
 properties:
   compatible:
     enum:
+      - mscc,vsc7512-switch
       - mscc,vsc9953-switch
       - pci1957,eef0
 
@@ -258,3 +273,100 @@ examples:
             };
         };
     };
+  # Ocelot-ext VSC7512
+  - |
+    #include <dt-bindings/phy/phy-ocelot-serdes.h>
+
+    soc@0 {
+        compatible = "mscc,vsc7512";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        reg = <0 0>;
+
+        ethernet-switch@0 {
+            compatible = "mscc,vsc7512-switch";
+            reg = <0x71010000 0x00010000>,
+                  <0x71030000 0x00010000>,
+                  <0x71080000 0x00000100>,
+                  <0x710e0000 0x00010000>,
+                  <0x711e0000 0x00000100>,
+                  <0x711f0000 0x00000100>,
+                  <0x71200000 0x00000100>,
+                  <0x71210000 0x00000100>,
+                  <0x71220000 0x00000100>,
+                  <0x71230000 0x00000100>,
+                  <0x71240000 0x00000100>,
+                  <0x71250000 0x00000100>,
+                  <0x71260000 0x00000100>,
+                  <0x71270000 0x00000100>,
+                  <0x71280000 0x00000100>,
+                  <0x71800000 0x00080000>,
+                  <0x71880000 0x00010000>,
+                  <0x71040000 0x00010000>,
+                  <0x71050000 0x00010000>,
+                  <0x71060000 0x00010000>;
+            reg-names = "sys", "rew", "qs", "ptp", "port0", "port1",
+                        "port2", "port3", "port4", "port5", "port6",
+                        "port7", "port8", "port9", "port10", "qsys",
+                        "ana", "s0", "s1", "s2";
+
+            ethernet-ports {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                port@0 {
+                    reg = <0>;
+                    ethernet = <&mac_sw>;
+                    phy-handle = <&phy0>;
+                    phy-mode = "internal";
+                };
+
+                port@1 {
+                    reg = <1>;
+                    label = "swp1";
+                    phy-mode = "internal";
+                    phy-handle = <&phy1>;
+                };
+
+                port@2 {
+                    reg = <2>;
+                    phy-mode = "internal";
+                    phy-handle = <&phy2>;
+                };
+
+                port@3 {
+                    reg = <3>;
+                    phy-mode = "internal";
+                    phy-handle = <&phy3>;
+                };
+
+                port@4 {
+                    reg = <4>;
+                    phy-mode = "qsgmii";
+                    phy-handle = <&phy4>;
+                    phys = <&serdes 4 SERDES6G(0)>;
+                };
+
+                port@5 {
+                    reg = <5>;
+                    phy-mode = "qsgmii";
+                    phy-handle = <&phy5>;
+                    phys = <&serdes 5 SERDES6G(0)>;
+                };
+
+                port@6 {
+                    reg = <6>;
+                    phy-mode = "qsgmii";
+                    phy-handle = <&phy6>;
+                    phys = <&serdes 6 SERDES6G(0)>;
+                };
+
+                port@7 {
+                    reg = <7>;
+                    phy-mode = "qsgmii";
+                    phy-handle = <&phy7>;
+                    phys = <&serdes 7 SERDES6G(0)>;
+                };
+            };
+        };
+    };
-- 
2.25.1