Received: by 2002:a05:6359:c8b:b0:c7:702f:21d4 with SMTP id go11csp3987229rwb; Sun, 9 Oct 2022 15:21:43 -0700 (PDT) X-Google-Smtp-Source: AMsMyM7cP2mDqpjilItDStpE0ARxmaOYZiK0uxVaB7RRb9hXkHZpSiPyTM323ZRifSz2WWoGAu3r X-Received: by 2002:a17:907:7f93:b0:781:dbee:dece with SMTP id qk19-20020a1709077f9300b00781dbeedecemr12427119ejc.323.1665354102718; Sun, 09 Oct 2022 15:21:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1665354102; cv=none; d=google.com; s=arc-20160816; b=bfEpvcI05biKbmTM9JYRZdH8ik9bGgz/816KxSTOiM1MHDKFEDe6CRcng+SCv/xZ2i gfuLQoCW351wlBZ81fDxyr5Jd1gvLkYJIbOPL+l9QErJNVZr8YifhhFUgGl/tmpRuy64 PNTQVX2mzG35mPH4heIQ1T6CLqeLSWJLJGS2M1hx0lgoSXcCtbUp2gGpHuGKTDdmgsFz uK/BVQoLJMCN02MylNVuieRKw7e2nEejokzWrRUkwsRk1Dzl+JHCUCI04YZzC8/B20D4 ANsb8pQ2XNJPbSxGPBfGQ4ReGCI5U5iNT6LjcQpxLArpBiEPHGEVg1JgNYKc2NKq76aj HDPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5UOFtgsQg088beaOCBj+1rFjV0/0TKQ4tqWSDoddVT0=; b=eq05TikHwfvLZkL4e6Bd8yNViq8c7U2jAvNn3+QLKaSgT06ZS086cqSvomvYR0TS4k oLmts19EatRcTrEoLIlLxSgEoxLGH4wPn2MUZayaakzLs2U/I15sPqThyc08JKoII2Ko /FrhVH8RKRdqsJOl3wQDxnVyiofrTfdbMhvhsZrnCfXCIT7iiZvhqSnLjpVur8xWY8w4 l53/D3OalQO18BQi4ZkGxD5sR7Zd5r8IeDHgd4bQhVgdxTu2oCwT/CVX+TAlLK3UUxCT CDA+KVBbZwDv4z59l+qautG4vB4E5AeL/bTAyt2PHgsapFGQL8rHuqxXmSSUCPrKcFbF Slsw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=grIlAGL9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from out1.vger.email (out1.vger.email. [2620:137:e000::1:20]) by mx.google.com with ESMTP id cx17-20020a05640222b100b00458fd857c9esi7124751edb.381.2022.10.09.15.21.17; Sun, 09 Oct 2022 15:21:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) client-ip=2620:137:e000::1:20; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=grIlAGL9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::1:20 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231219AbiJIWKD (ORCPT + 99 others); Sun, 9 Oct 2022 18:10:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40930 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230254AbiJIWJH (ORCPT ); Sun, 9 Oct 2022 18:09:07 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CDA1B286DE; Sun, 9 Oct 2022 15:08:49 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id B1536B80DD2; Sun, 9 Oct 2022 22:08:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1F761C43143; Sun, 9 Oct 2022 22:08:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665353325; bh=QRlhcj5BMHJzNR3pQ4+/M72AS4Peto5sSQnQiwknc4c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=grIlAGL948xJQrVbsGm7G8eHP4iQOH19ZVB3//2GhzSmvlQU4CPFDOuEO4Bgrg9qI g9KK9x8TQozzyzQzjDzMTMBzEmvKNaowHZzw074pBsi0mWLrIFDP7rUrHYfnED3Zb1 BG2+uIavtlg+TEph2BwzsZjZU1tPHosAXiuIzUFs1iH/jKRT/zNYQPxUmQ26ufvt0I KkgAV0RUb+8+sQ5qw3rNCi/YHAdW3FVhth7unKa004kgkXWLLjjLeVs3tDjajPvYSA Mxdd50URFoEsF5M9Bh1YrlVcBkr4cEA01PTLfoNxWT00Uw8UgeoX0k4VPTgX69V51p 7ZA8F79PtWULA== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Marcus Carlberg , Jakub Kicinski , Sasha Levin , andrew@lunn.ch, vivien.didelot@gmail.com, f.fainelli@gmail.com, olteanv@gmail.com, davem@davemloft.net, edumazet@google.com, pabeni@redhat.com, netdev@vger.kernel.org Subject: [PATCH AUTOSEL 6.0 18/77] net: dsa: mv88e6xxx: Allow external SMI if serial Date: Sun, 9 Oct 2022 18:06:55 -0400 Message-Id: <20221009220754.1214186-18-sashal@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221009220754.1214186-1-sashal@kernel.org> References: <20221009220754.1214186-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-7.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_HI, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Marcus Carlberg [ Upstream commit 8532c60efcc5b7b382006129b77aee2c19c43f15 ] p0_mode set to one of the supported serial mode should not prevent configuring the external SMI interface in mv88e6xxx_g2_scratch_gpio_set_smi. The current masking of the p0_mode only checks the first 2 bits. This results in switches supporting serial mode cannot setup external SMI on certain serial modes (Ex: 1000BASE-X and SGMII). Extend the mask of the p0_mode to include the reduced modes and serial modes as allowed modes for the external SMI interface. Signed-off-by: Marcus Carlberg Link: https://lore.kernel.org/r/20220824093706.19049-1-marcus.carlberg@axis.com Signed-off-by: Jakub Kicinski Signed-off-by: Sasha Levin --- drivers/net/dsa/mv88e6xxx/global2.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/dsa/mv88e6xxx/global2.h b/drivers/net/dsa/mv88e6xxx/global2.h index 807aeaad9830..7536b8b0ad01 100644 --- a/drivers/net/dsa/mv88e6xxx/global2.h +++ b/drivers/net/dsa/mv88e6xxx/global2.h @@ -298,7 +298,7 @@ #define MV88E6352_G2_SCRATCH_CONFIG_DATA1 0x71 #define MV88E6352_G2_SCRATCH_CONFIG_DATA1_NO_CPU BIT(2) #define MV88E6352_G2_SCRATCH_CONFIG_DATA2 0x72 -#define MV88E6352_G2_SCRATCH_CONFIG_DATA2_P0_MODE_MASK 0x3 +#define MV88E6352_G2_SCRATCH_CONFIG_DATA2_P0_MODE_MASK 0xf #define MV88E6352_G2_SCRATCH_CONFIG_DATA3 0x73 #define MV88E6352_G2_SCRATCH_CONFIG_DATA3_S_SEL BIT(1) -- 2.35.1