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From:   Yi xin Zhu <yzhu@maxlinear.com>
To:     Rahul Tanwar <rtanwar@maxlinear.com>,
        "sboyd@kernel.org" <sboyd@kernel.org>,
        "mturquette@baylibre.com" <mturquette@baylibre.com>,
        "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>
CC:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        linux-lgm-soc <linux-lgm-soc@maxlinear.com>
Subject: Re: [PATCH v3 0/4] Modify MxL's CGU clk driver to make it secure boot
 compatible
Thread-Topic: [PATCH v3 0/4] Modify MxL's CGU clk driver to make it secure
 boot compatible
Thread-Index: AQHY2J37XmJGGcOb7UuL1GQdLj72uQ==
Date:   Tue, 11 Oct 2022 08:04:17 +0000
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References: <cover.1664958833.git.rtanwar@maxlinear.com>
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On 5/10/2022 5:36 pm, Rahul Tanwar wrote:=0A> MxL's CGU driver was found to=
 be lacking below required features. Add these=0A> required lacking feature=
s:=0A>=0A> 1. Since it is a core driver, it has to conform to secure boot &=
 secure=0A>    access architecture. In order for the register accesses to b=
e secure=0A>    access compliant, it needs regmap support as per our securi=
ty architecture.=0A>    Hence, replace direct read/writel with regmap based=
 IO. Also remove=0A>    redundant spinlocks from the driver as they are no =
longer necessary=0A>    because regmap uses its own lock.=0A>=0A> 2. In MxL=
's LGM SoC, gate clocks can be controlled either from CGU clk driver=0A>   =
 i.e. this driver or directly from power management driver/daemon. It is=0A=
>    dependent on the power policy/profile requirements of the end product.=
=0A>=0A>    To support such use cases, provide option to override gate clks=
 enable/disable=0A>    by adding a flag GATE_CLK_HW which controls if these=
 gate clks are controlled=0A>    by HW i.e. this driver or overridden in or=
der to allow it to be controlled=0A>    by power profiles instead.=0A>=0A> =
3. Fix a bug related to missing flags in one 'dcl' clk entry.=0A>=0A> This =
patch series is based on below git tree (linux-v6.0-rc1):=0A> git://git.ker=
nel.org/pub/scm/linux/kernel/git/clk/linux.git=0A>=0A>=0A> Rahul Tanwar (4)=
:=0A>   clk: mxl: Switch from direct readl/writel based IO to regmap based =
IO=0A>   clk: mxl: Remove redundant spinlocks=0A>   clk: mxl: Add option to=
 override gate clks enable/disable=0A>   clk: mxl: Fix a clk entry by addin=
g relevant flags=0A>=0A>  drivers/clk/x86/Kconfig       |   5 +-=0A>  drive=
rs/clk/x86/clk-cgu-pll.c |  23 ++-----=0A>  drivers/clk/x86/clk-cgu.c     |=
 122 +++++++++++-----------------------=0A>  drivers/clk/x86/clk-cgu.h     =
|  46 ++++++-------=0A>  drivers/clk/x86/clk-lgm.c     |  18 +++--=0A>  5 f=
iles changed, 82 insertions(+), 132 deletions(-)=0A>=0AReviewed-by: Yi xin =
Zhu <yzhu@maxlinear.com> for entire series.=0A=0A