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From:   =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= <bjorn@kernel.org>
To:     Liu Shixin <liushixin2@huawei.com>,
        Conor Dooley <conor@kernel.org>,
        Kefeng Wang <wangkefeng.wang@huawei.com>,
        Jonathan Corbet <corbet@lwn.net>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>
Cc:     linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
        linux-riscv@lists.infradead.org, Liu Shixin <liushixin2@huawei.com>
Subject: Re: [PATCH v2 0/2] riscv: Support HAVE_ARCH_HUGE_VMAP and
 HAVE_ARCH_HUGE_VMALLOC
In-Reply-To: <20221008140506.1066805-1-liushixin2@huawei.com>
References: <20221008140506.1066805-1-liushixin2@huawei.com>
Date:   Tue, 11 Oct 2022 14:39:44 +0200
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Liu Shixin <liushixin2@huawei.com> writes:

> Since riscv64 has already support SATP_MODE_57 by default, it is time to
> support more hugepage-related features. These two patches will enable
> HAVE_ARCH_HUGE_VMAP and HAVE_ARCH_HUGE_VMALLOC.
>

Just a note; The HP support does not require sv57. Pmd/Mega- and
pud/gigapages work for sv39 and sv48 as well.

> v1->v2: Fix the build error reported by kernel-test.
>
> Liu Shixin (2):
>   riscv: Enable HAVE_ARCH_HUGE_VMAP for 64BIT
>   riscv: Enable HAVE_ARCH_HUGE_VMALLOC for 64BIT
>
>  .../features/vm/huge-vmap/arch-support.txt    |  2 +-
>  arch/riscv/Kconfig                            |  2 +
>  arch/riscv/include/asm/vmalloc.h              | 18 ++++
>  arch/riscv/mm/Makefile                        |  1 +
>  arch/riscv/mm/pgtable.c                       | 83 +++++++++++++++++++
>  5 files changed, 105 insertions(+), 1 deletion(-)
>  create mode 100644 arch/riscv/mm/pgtable.c
>

I've taken this series for a spin, and tested huge pud pages via
ioremap(), and huge pmd pages via vmalloc_huge() on qemu for sv39, sv48,
and sv57.

Patch 2 have a spelling error in the commit message: "enbale" vs
"enable".

Fix up the spelling error in patch 2, and after that feel free to add
for the whole series:

Reviewed-by: Bj=C3=B6rn T=C3=B6pel <bjorn@kernel.org>
Tested-by: Bj=C3=B6rn T=C3=B6pel <bjorn@kernel.org>


Nice work!
Bj=C3=B6rn